Abstract: A process is provided for fabricating an in-situ sealed integrated vacuum device (30). The process comprises growing an electron emissive material (24) on a cathode layer (14) within a well (22) surrounded by a dielectric (16, 20), and forming, in a vacuum, an anode (32) on the dielectric (16, 20) and above the well (22), thereby encasing the vacuum within the well (22).

Abstract: A method for forming a semiconductor device in a semiconductor device manufacturing apparatus (20) having a sensor (30) activated extensible shuttle (28). In a fabrication environment shuttle (28) is housed within semiconductor device manufacturing apparatus (20), where an outer door (32) is closed flush with an outer wall of the apparatus (20). As a substrate carrier (38) is moved near the apparatus (20), sensor (30) activates opening of outer door (32) and extension of shuttle (28) out of the apparatus (20) into the fabrication environment. In one embodiment, shuttle (28) has a sensor which is used to determine if carrier (38) is placed on shuttle (28) within a predetermined time, allowing retraction of shuttle (28) until it is required. The present invention increases the available operative space within the fabrication environment, and provides a clean mini-environment within apparatus (20).

Abstract: A means and method for forming improved merged complementary bipolar, complementary MOS (CBICMOS) structures is described. The N-channel and N-base devices are gouped in a first isolated semiconductor region and the P-channel and P-base devices are grouped in a second isolated semiconductor region. The two regions are separated by lateral isolation. By sharing internal device regions and arranging the internal device regions in the proper sequence a particularly compact structure is obtained which may be wired to implement a variety of CBICMOS circuits using a single wiring layer. Both CMOS and vertical NPN and PNP bipolar devices are produced in a common substrate by a common process.

Abstract: A means and method for forming improved merged complementary bipolar, complementary MOS (CBICMOS) structures is described. The N-channel and N-base devices are grouped in a first isolated semiconductor region and the P-channel and P-base devices are grouped in a second isolated semiconductor region. The two regions are separated by lateral isolation. By sharing internal device regions and arranging the internal device regions in the proper sequence a particularly compact structure is obtained which may be wired to implement a variety of CBICMOS circuits using a single wiring layer. Both CMOS and vertical NPN and PNP bipolar devices are produced in a common substrate by a common process.

Abstract: A process is described for producing isolated semiconductor devices in a common substrate which have self-aligned and pre-located isolation walls, buried layers, and channel-stops. The isolation walls are formed from a stacked arrangement of a dielectric region and a non-single crystal semiconductor region, above a doped channel-stop region. A single mask layer determines the location and spacing of the non-single crystal portion of the isolation walls, the channel-stops, and the buried layers.

Abstract: Improved self-aligned semiconductor devices are made using two sets of superposed pattern forming layers; a master mask layer set containing the self-aligned patterns, and a pattern selector layer set which allows different apertures in the master mask layer to be selectively re-opened so that different device regions may be sequentially formed. The master mask layer is a double layer of a first material resistant to typical device forming processes, covered by a second etch stop material. The selector layer may be a single process resistant material or a double layer. Using combinations of silicon oxide and nitride, the process is applied to the formation of silicon islands with emitters and emitter, base, and collector contacts self-aligned to each other and a surrounding oxide isolation region. Significant area and cost savings are achieved without additional masking steps or precision alignments.