Abstract: In one embodiment, the present invention includes a transmitter having a baseband, a multiplexer, a digital-to-analog converter unit, and/or a Chireix combiner. The baseband transmits components of an in-phase signal and a quadrature-phase signal to the multiplexer. The multiplexer generates a first signal and/or a second signal which have a phase difference which matches only a single predetermined phase difference. The single predetermined phase difference should be selected to ensure that the Chireix combiner is optimized for efficiency. Thus, a phase of the first signal or the second signal can have a phase of the in-phase signal or the quadrature-phase signal to ensure that the phase difference between the second signal and the first signal matches only the single predetermined phase difference. The Chireix combiner receives the first analog signal and the second analog signal.

Abstract: In one embodiment, the present invention includes a transmitter having a baseband, a multiplexer, a digital-to-analog converter unit, and/or a Chireix combiner. The baseband transmits components of an in-phase signal and a quadrature-phase signal to the multiplexer. The multiplexer generates a first signal and/or a second signal which have a phase difference which matches only a single predetermined phase difference. The single predetermined phase difference should be selected to ensure that the Chireix combiner is optimized for efficiency. Thus, a phase of the first signal or the second signal can have a phase of the in-phase signal or the quadrature-phase signal to ensure that the phase difference between the second signal and the first signal matches only the single predetermined phase difference. The Chireix combiner receives the first analog signal and the second analog signal.

Abstract: A polar transmitter includes a power amplifier (PA), an amplitude modulation (AM) path including an AM path adjustable delay, an AM path delay measurement circuit, a phase modulation (PM) path including a PM path adjustable delay, and a PM path delay measurement circuit. The AM path delay measurement circuit is configured to measure an AM path delay using waveform correlation, e.g., using peak magnitude events (PMEs) in signals transmitted along the AM path to a power supply port of the PA. The PM path delay measurement circuit is configured to measure a PM path delay using waveform correlation, e.g., using PMEs in signals transmitted along the PM path to a phase-modulated input of the PA. The measured AM and PM path delays are used to adjust the AM and PM path adjustable delays, to reduce the delay mismatch between signals appearing at the power supply and phase-modulated input ports of the polar transmitter's PA.

Abstract: The invention relates to a method and apparatus for integrating the various circuit components controlling a voltage-controlled oscillator (“VCO”) on an integrated circuit formed on a semiconductor device. In one embodiment, the integrated circuit includes a first digital-to-analog converter (“DAC”) for receiving and converting a digital representation of the frequency modulation for the VCO to an analog form. A filter removes any conversion error from the first analog signal. A second DAC receives and converts a digital representation of the center frequency for the VCO to a second analog signal. The first and second analog signals are combined at an adder and the resulting signal is used by a bridge circuit which controls the VCO.

Abstract: The invention relates to a method and apparatus for integrating the various circuit components controlling a voltage-controlled oscillator (“VCO”) on an integrated circuit formed on a semiconductor device. In one embodiment, the integrated circuit includes a first digital-to-analog converter (“DAC”) for receiving and converting a digital representation of the frequency modulation for the VCO to an analog form. A filter removes any conversion error from the first analog signal. A second DAC receives and converts a digital representation of the center frequency for the VCO to a second analog signal. The first and second analog signals are combined at an adder and the resulting signal is used by a bridge circuit which controls the VCO.

Abstract: A transceiver adapted to reduce receive band noise includes a transmitter, a receiver, a duplexer coupled between the transmitter and receiver, and a baseband circuit configured in a feed-forward path between a baseband section of the transmitter and a baseband section of the receiver. The baseband circuit is configured to generate an error signal representing errors generated in the baseband section of the transmitter and feed forward the error signal to an insertion point in the baseband section of the receiver. The insertion point is configured to combine the error signal generated by the baseband circuit with a received signal containing receive band noise leaked from the transmitter to the receiver via a transmit signal leakage path in the duplexer. The error signal and received signal are combined to reduce the receive band noise in the received signal.

Abstract: An apparatus for providing an angle modulated signal includes a tunable oscillator circuit, a variable time delay circuit, and an optional scaling and delay control apparatus. The tunable oscillator circuit generates an oscillatory signal having a predetermined frequency. The variable time delay circuit operates to delay the oscillatory signal in accordance with time varying changes in an angle control signal, thereby producing the desired angle modulated signal. The scaling and delay control apparatus is configured to scale the angle control signal to account for frequency dependent phase delays of the oscillatory signal through the variable time delay circuit.

Abstract: A polar transmitter includes a power amplifier (PA), an amplitude modulation (AM) path including an AM path adjustable delay, an AM path delay measurement circuit, a phase modulation (PM) path including a PM path adjustable delay, and a PM path delay measurement circuit. The AM path delay measurement circuit is configured to measure an AM path delay using waveform correlation, e.g., using peak magnitude events (PMEs) in signals transmitted along the AM path to a power supply port of the PA. The PM path delay measurement circuit is configured to measure a PM path delay using waveform correlation, e.g., using PMEs in signals transmitted along the PM path to a phase-modulated input of the PA. The measured AM and PM path delays are used to adjust the AM and PM path adjustable delays, to reduce the delay mismatch between signals appearing at the power supply and phase-modulated input ports of the polar transmitter's PA.

Abstract: An exemplary modulator apparatus for a polar modulation transmitter includes a phase difference extractor, a phase modulator, and a coarse phase controller. The phase difference extractor is configured to extract +180° and ?180° phase differences represented in a phase-difference modulation signal in a phase modulation path of the polar modulation transmitter, or extract other phase differences exceeding other predetermined phase difference thresholds, to produce a bandwidth-reduced phase-difference modulation signal. The phase modulator includes a controlled oscillator having a tuning port that is modulated by phase differences represented in the bandwidth-reduced phase-difference modulation signal, to produce a phase-modulated RF carrier signal. The coarse phase controller operates to effectuate phase reversals or introduce other coarse phase changes into the phase-modulated RF carrier signal, based on the phase differences extracted from the original phase-difference modulation signal.

Abstract: An apparatus for providing an angle modulated signal includes a tunable oscillator circuit, a variable time delay circuit, and an optional scaling and delay control apparatus. The tunable oscillator circuit generates an oscillatory signal having a predetermined frequency. The variable time delay circuit operates to delay the oscillatory signal in accordance with time varying changes in an angle control signal, thereby producing the desired angle modulated signal. The scaling and delay control apparatus is configured to scale the angle control signal to account for frequency dependent phase delays of the oscillatory signal through the variable time delay circuit.

Abstract: A circuit includes a first semiconductor device and a second semiconductor device. The first semiconductor device has a first source region, a first gate region, and a first drain region. The first gate region and the first drain region are separated by a first distance. The second semiconductor device has a second source region, a second gate region, and a second drain region. The second gate region and the second drain region separated by a second distance. The first distance is greater than the second distance.

Abstract: An amplifier circuit (100) includes a driver stage (120) with active devices (140) for pre-amplification and output of a pre-amplified signal; and an output stage (160) with active devices (180) for further amplification of the pre-amplified signal and output of an amplified signal. A detector (190) measures levels of forward and reflected parts of the amplified signal, and a control circuit (145) independently and selectively controls turning on and off of the active devices (140, 180) of the driver and output stages (120, 160) as a function of the levels of the forward and reflected signals to substantially maintain linearity of the amplifier circuit (100) with load variations.

Abstract: An amplifier circuit (100) includes a driver stage ( ) 120 with at least an active device (140) for pre-amplification and output of a pre-amplified signal; and an output stage (160) with at least an active device (180) for further amplification of the pre-amplified signal and output of an amplified signal. A phase shifter (155) shifts the phase of the pre-amplified signal. A detector (190) measures levels of forward and reflected parts of the amplified signal, and a gain and phase control circuit (145) independently and selectively controls and adjusts the phase shifter (155) for optimal amplifier performance and minimal difference between the forward and reflected signals. The gain and phase control circuit also independently and selectively controls and modifies the gain of the active devices (140, 180) of the driver and output stages (120, 160) as a function of the levels of the forward and reflected signals to substantially maintain constant linearity of the amplifier circuit (100) with load variations.

Abstract: An amplifier circuit (100) includes a driver stage ( ) 120 with at least an active device (140) for pre-amplification and output of a pre-amplified signal; and an output stage (160) with at least an active device (180) for further amplification of the pre-amplified signal and output of an amplified signal. A phase shifter (155) shifts the phase of the pre-amplified signal. A detector (190) measures levels of forward and reflected parts of the amplified signal, and a gain and phase control circuit (145) independently and selectively controls and adjusts the phase shifter (155) for optimal amplifier performance and minimal difference between the forward and reflected signals. The gain and phase control circuit also independently and selectively controls and modifies the gain of the active devices (140, 180) of the driver and output stages (120, 160) as a function of the levels of the forward and reflected signals to substantially maintain constant linearity of the amplifier circuit (100) with load variations.

Abstract: An amplifier circuit (100) includes a driver stage (120) with active devices (140) for pre-amplification and output of a pre-amplified signal; and an output stage (160) with active devices (180) for further amplification of the pre-amplified signal and output of an amplified signal. A detector (190) measures levels of forward and reflected parts of the amplified signal, and a control circuit (145) independently and selectively controls turning on and off of the active devices (140, 180) of the driver and output stages (120, 160) as a function of the levels of the forward and reflected signals to substantially maintain linearity of the amplifier circuit (100) with load variations.