Patents by Inventor Salman Akram

Salman Akram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200098804
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Application
    Filed: November 27, 2019
    Publication date: March 26, 2020
    Inventor: Salman Akram
  • Patent number: 10504948
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: December 10, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Patent number: 10490644
    Abstract: In a general aspect, a power semiconductor device can include a silicon carbide (SiC) substrate and a SiC epitaxial layer disposed on the SiC substrate. The device can include a well region disposed in the epitaxial layer, a source region disposed in the well region and a gate trench disposed in the epitaxial layer and adjacent to the source region. The gate trench can have a depth that is greater than a depth of the well region and less than a depth of the epitaxial layer. The device can include a hybrid gate dielectric disposed on a sidewall of the gate trench and a bottom surface of the gate trench. The hybrid gate dielectric can include a first high-k material and a second high-k dielectric material that is different than the first high-k dielectric material. The device can include a conductive gate electrode disposed on the hybrid gate dielectric.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: November 26, 2019
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Salman Akram, Venkat Ananthan
  • Patent number: 10446440
    Abstract: A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: October 15, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, James M. Wark, William Mark Hiatt
  • Patent number: 10181486
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: January 15, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Publication number: 20180358263
    Abstract: A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Inventors: Salman Akram, James M. Wark, William Mark Hiatt
  • Publication number: 20180342547
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Application
    Filed: August 3, 2018
    Publication date: November 29, 2018
    Inventor: Salman Akram
  • Publication number: 20180269302
    Abstract: In a general aspect, a power semiconductor device can include a silicon carbide (SiC) substrate and a SiC epitaxial layer disposed on the SiC substrate. The device can include a well region disposed in the epitaxial layer, a source region disposed in the well region and a gate trench disposed in the epitaxial layer and adjacent to the source region. The gate trench can have a depth that is greater than a depth of the well region and less than a depth of the epitaxial layer. The device can include a hybrid gate dielectric disposed on a sidewall of the gate trench and a bottom surface of the gate trench. The hybrid gate dielectric can include a first high-k material and a second high-k dielectric material that is different than the first high-k dielectric material. The device can include a conductive gate electrode disposed on the hybrid gate dielectric.
    Type: Application
    Filed: May 17, 2018
    Publication date: September 20, 2018
    Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventors: Salman AKRAM, Venkat ANANTHAN
  • Patent number: 10062608
    Abstract: A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: August 28, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, James M. Wark, William Mark Hiatt
  • Patent number: 10050180
    Abstract: Semiconductor LED layers are epitaxially grown on a patterned surface of a sapphire substrate. The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact and an n-metal contact. A dielectric polymer stress-buffer layer is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: August 14, 2018
    Assignee: LUMILEDS LLC
    Inventors: Salman Akram, Quanbo Zou
  • Publication number: 20180175085
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Application
    Filed: February 14, 2018
    Publication date: June 21, 2018
    Inventor: Salman Akram
  • Patent number: 10002941
    Abstract: In a general aspect, a power semiconductor device can include a silicon carbide (SiC) substrate and a SiC epi-layer disposed on the SiC substrate. The device can also include a first well region, a second well region disposed in the SiC epi-layer, a first source region disposed in the first well region, and a second source region disposed in the second well region. The device can further include a gate structure disposed on the SiC epi-layer and extending between the first source region and the second source region. The gate structure can include a hybrid gate dielectric. The hybrid gate dielectric can include a first high-k dielectric material and a second high-k dielectric material. The device can also include a conductive gate electrode disposed on the hybrid gate dielectric.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: June 19, 2018
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Salman Akram, Venkat Ananthan
  • Patent number: 9960148
    Abstract: Methods and apparatuses for transferring heat from stacked microfeature devices are disclosed herein. In one embodiment, a microfeature device assembly comprises a support member having terminals and a first microelectronic die having first external contacts carried by the support member. The first external contacts are operatively coupled to the terminals on the support member. The assembly also includes a second microelectronic die having integrated circuitry and second external contacts electrically coupled to the first external contacts. The first die is between the support member and the second die. The assembly can further include a heat transfer unit between the first die and the second die. The heat transfer unit includes a first heat transfer portion, a second heat transfer portion, and a gap between the first and second heat transfer portions such that the first external contacts and the second external contacts are aligned with the gap.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: May 1, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, David R. Hembree
  • Patent number: 9935069
    Abstract: A technique is disclosed for causing the top surfaces of solder bumps on a chip to be in the same plane to ensure a more reliable bond between the chip and a substrate. The chip is provided with solder pads that may have different heights. A dielectric layer is formed between the solder pads. A relatively thick metal layer is plated over the solder pads. The metal layer is planarized to cause the top surfaces of the metal layer portions over the solder pads to be in the same plane and above the dielectric layer. A substantially uniformly thin layer of solder is deposited over the planarized metal layer portions so that the top surfaces of the solder bumps are substantially in the same plane. The chip is then positioned over a substrate having corresponding metal pads, and the solder is reflowed or ultrasonically bonded to the substrate pads.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: April 3, 2018
    Assignee: LUMILEDS LLC
    Inventors: Jipu Lei, Stefano Schiaffino, Alexander H. Nickel, Mooi Guan Ng, Salman Akram
  • Patent number: 9911769
    Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: March 6, 2018
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Publication number: 20170358715
    Abstract: Semiconductor LED layers are epitaxially grown on a patterned surface of a sapphire substrate. The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact and an n-metal contact. A dielectric polymer stress-buffer layer is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.
    Type: Application
    Filed: April 28, 2017
    Publication date: December 14, 2017
    Inventors: Salman Akram, Quanbo Zou
  • Publication number: 20170301834
    Abstract: Light Emitting Devices (LEDs) are fabricated on a wafer substrate with one or more thick metal layers that provide structural support to each LED. The streets, or lanes, between individual LEDs do not include this metal, and the wafer can be easily sliced/diced into singulated self-supporting LEDs. Because these devices are self-supporting, a separate support submount is not required. Before singulation, further processes may be applied at the wafer-level; after singulation, these self-supporting LEDs may be picked and placed upon an intermediate substrate for further processing as required. In an embodiment of this invention, protective optical domes are formed over the light emitting devices at the wafer-level or while the light emitting devices are situated on the intermediate substrate.
    Type: Application
    Filed: February 16, 2017
    Publication date: October 19, 2017
    Inventors: Salman Akram, Jyoti Kiron Bhardwaj
  • Publication number: 20170283954
    Abstract: A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.
    Type: Application
    Filed: May 2, 2017
    Publication date: October 5, 2017
    Inventors: Salman Akram, James M. Wark, William Mark Hiatt
  • Patent number: 9705047
    Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a light emitting layer sandwiched between an n-type region and a p-type region. A wafer of support substrates is provided, each support substrate including a body. The wafer of semiconductor light emitting devices is bonded to the wafer of support substrates. Vias are formed extending through the entire thickness of the body of each support substrate.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: July 11, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Daniel Alexander Steigerwald, Jerome Chandra Bhat, Salman Akram
  • Patent number: 9660154
    Abstract: Light Emitting Devices (LEDs) are fabricated on a wafer substrate with one or more thick metal layers that provide structural support to each LED. The streets, or lanes, between individual LEDs do not include this metal, and the wafer can be easily sliced/diced into singulated self-supporting LEDs. Because these devices are self-supporting, a separate support submount is not required. Before singulation, further processes may be applied at the wafer-level; after singulation, these self-supporting LEDs may be picked and placed upon an intermediate substrate for further processing as required. In an embodiment of this invention, protective optical domes are formed over the light emitting devices at the wafer-level or while the light emitting devices are situated on the intermediate substrate.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: May 23, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Salman Akram, Jyoti Kiron Bhardwaj