Abstract: A tool is provided for applying a flowable composition onto a receiving surface. The tool includes a polyceramic coating on a surface thereof and may take the form of a stencil or mold. Also provided are an apparatus and a method that uses the tool. In use, the tool is placed such that its polyceramic-coated surface is in contact with the flowable composition, which, in turn, simultaneously contacts the receiving surface.

Abstract: A stackable chip assembly is disclosed, as are many different embodiments relating to same. The chip assembly preferably includes at least two substrates with components mounted on each. The substrates are preferably situated with respect to one another such that components on one substrate extend towards the other substrate and vice versa. The components of each substrate preferably extend between each other. In addition various connections between the substrates are disclosed, as well as methods of constructing such chip assemblies.

Abstract: A method of protecting a microelectronic chip contained in a microelectronic assembly, including the steps of depositing a protective coating across the exposed faces of the chip. The coating, having a low modulus of elasticity, is applied across the chip so as to reduce the overall height of the assembly while still protecting the exposed face and corners of the chip from damage.

Abstract: A tool is provided for applying a flowable composition onto a receiving surface. The tool includes a polyceramic coating on a surface thereof and may take the form of a stencil or mold. Also provided are an apparatus and a method that uses the tool. In use, the tool is placed such that its polyceramic-coated surface is in contact with the flowable composition, which, in turn, simultaneously contacts the receiving surface.

Abstract: A semiconductor package is provided that has a rigid metal substrate and a dielectric layer covering a first portion of the rigid metal substrate, with a second portion of the rigid metal substrate being substantially free of the dielectric layer. A semiconductor device is electrically bonded to the second portion of the rigid metal substrate and metal circuit traces defining electrical paths are formed on the dielectric layer, at least one of which contacts the rigid metal substrate through at least one via in the dielectric layer. Additionally, a method is provided for grounding a semiconductor device and at least one circuit trace on a rigid metal substrate substantially covered by a dielectric layer, which includes creating at least one via in the dielectric layer using a laser and creating circuit traces on the dielectric layer, at least one of which contacts the rigid metal substrate through at least one of the vias.