Abstract: The memory device (for example, a DRAM) includes a matrix of memory cells arranged in a plurality of rows and columns (for example, organized in pairs), which include redundancy rows and columns for replacing defective rows and columns. Each one of a plurality of bit lines is connected to the cells of a corresponding column, and each one of a plurality of word lines is connected to the cells of a corresponding row. A bit line driver is used for biasing the bit lines and a word line driver is used for biasing the word lines. Each one of a plurality of selectors is arranged along a potential conduction path between the bit line driver and the word line driver through a set of corresponding word lines and bit lines. A selection driver is used for setting each selector to a first resistance (for example, closed) if the corresponding rows and columns are non-defective or to a second resistance higher than the first resistance (for example, open) if at least one of the corresponding rows and columns is defective.

Abstract: A method of making and testing an electronic device that includes providing first and second external pins, first and second pads on the substrate connected to the first external pin by respective bonding wires, and third and fourth pads on the substrate connected to the second external pin respective bonding wires, and to a first common line by respective resistors. With a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.

Abstract: An electronic device having first and second external pins; first and second pads connected to the first external pin by respective bonding wires; and third and fourth pads connected to the second external pin respective bonding wires, and to a first common line by respective resistors. By means of a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.

Abstract: A switching voltage regulator includes a metal oxide semiconductor (MOS) power switch and driver circuit therefor. The MOS power switch may include a plurality of n power transistors each connected in parallel with one other. In particular, the first of the plurality of power transistors may have a larger size than the other power transistors. More specifically, the respective sizes of the individual power transistors may scale down from one to the next. In this way, an equivalent size of the power switch is greatly reduced with respect to prior art switches in that the first and largest transistor may be readily turned off. This may be carried out without substantially affecting the delivered current, which continues to be supplied by the remaining transistors. Further, a transconductance of the power switch may decrease as the power transistors are turned off in order from the first through the nth power transistors.

Abstract: An electronic device having first and second external pins; first and second pads connected to the first external pin by respective bonding wires; and third and fourth pads connected to the second external pin respective bonding wires, and to a first common line by respective resistors. By means of a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.

Abstract: A switching voltage regulator includes a metal oxide semiconductor (MOS) power switch and driver circuit therefor. The MOS power switch may include a plurality of n power transistors each connected in parallel with one other. In particular, the first of the plurality of power transistors may have a larger size than the other power transistors. More specifically, the respective sizes of the individual power transistors may scale down from one to the next. In this way, an equivalent size of the power switch is greatly reduced with respect to prior art switches in that the first and largest transistor may be readily turned off. This may be carried out without substantially affecting the delivered current, which continues to be supplied by the remaining transistors. Further, a transconductance of the power switch may decrease as the power transistors are turned off in order from the first through the nth power transistors.

Abstract: An integrated circuit includes a first access pin and a second access pin, and an electronic circuit for trimming a portion of the integrated circuit. The electronic circuit includes a memory element, and a regulation circuit for modifying the memory element. The regulation circuit includes an error amplifier for comparing an output voltage of the portion of the integrated circuit to be trimmed with an internal voltage reference. A comparator includes a first input connected to an output of the error amplifier and to the first access pin. A first switch is connected between the output of the error amplifier and the first input of the comparator. A second comparator includes a first input connected to the second access pin, and an output connected to the first switch for control thereof. A second switch is connected to the output of the error amplifier and to the first access pin.

Abstract: An electronic device having first and second external pins; first and second pads connected to the first external pin by respective bonding wires; and third and fourth pads connected to the second external pin respective bonding wires, and to a first common line by respective resistors. By means of a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.

Abstract: A frequency translator is usable in a switching DC-DC converter of the type operating as a voltage regulator and as a battery charger. The frequency translator receives at inputs a division voltage (VFB) proportional to a present value of the output voltage (VOUT) of the DC-DC converter, a reference voltage (VREF) correlated to a nominal value of the output voltage (VOUT), and a limiting signal (VL) indicative of a normal operation or of current limitation operation of the DC-DC converter, and supplies at an output a bias current (IBIAS) which is supplied to an input of an oscillator supplying at an output a comparison signal (VC) presenting a periodic pattern with a frequency which is correlated to the bias current (IBIAS).

Abstract: A voltage regulator circuit produces a voltage reference with high line rejection even for low values of the supply voltage. The regulator is of the type that produces a regulated voltage value for a bandgap voltage generator and includes a regulation circuit portion and a reference circuit portion. The regulation circuit portions is supplied with the supply voltage and has an output at which the regulated voltage value is produced and an input that receives a voltage reference. The reference circuit portion produces the voltage reference and includes a first circuit leg that receives the supply voltage through a controlled switch and a second circuit leg that receives the regulated voltage value.

Abstract: An electronic device smoothes a charge current peak in RLC output stages of switching step-up regulators, which stages include an input terminal and an output terminal with an inductance and a parasitic resistance in series therebetween, the latter corresponding to the series parasitic resistance of the inductance, and a capacitor connected between the output terminal and a ground. The device comprises a parallel of a resistor and a controlled switch connected between the inductance and the output terminal of the stage upstream of the capacitor. Advantageously, the switch would only be open during the charge transient of the capacitor.