Patents by Inventor Salvatore Drago

Salvatore Drago has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11557910
    Abstract: A method for power management for applications having duty-cycled high peak supply currents includes charging a buffer capacitor with a first current supplied by a battery, wherein the first current is limited by a current limiter. A load is supplied with a second current supplied by the buffer capacitor, wherein the second current comprises a pulsed current. The current limiter is controlled with at least one of a plurality of sensor inputs to limit a capacity degradation of the battery.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: January 17, 2023
    Assignee: NXP B.V.
    Inventors: Jan van Sinderen, Salvatore Drago, Gerard Villar Pique, Esa Petri Tarvainen, Wolfgang Hoess
  • Patent number: 11405247
    Abstract: A communication device and method include a reconfigurable receiver that is reconfigurable between communication, ranging and radar modes. The reconfigurable receiver includes a mixer configured to mix digital samples with a carrier phase estimate signal and configured to generate in-phase digital samples based on the carrier phase estimate. The reconfigurable receiver further includes a symbol correlator configured to correlate against the in-phase digital samples and generate correlated data, and a symbol binning unit configured to bin the correlated data and generate a first order channel impulse response estimate. The reconfigurable receiver yet further includes a multiplexer configured to switch the digital samples to the symbol binning unit when the reconfigurable receiver is configured in radar mode and to switch the correlated data to the symbol binning unit when the reconfigurable receiver is configured in a ranging mode.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: August 2, 2022
    Assignee: NXP USA, Inc.
    Inventors: Thomas Baier, Manuel Lafer, Gert Holler, Salvatore Drago
  • Patent number: 11381329
    Abstract: A moving object detector detects a moving object in a channel. The detection comprises the detector receiving a plurality of frames based on a transmitter transmitting a plurality of frames over a channel. One or more channel impulse responses (CIRs) of the channel is determined based on the received plurality of frames. The detector determines a CIR phase for each of the CIRs and a phase signal is formed based on a phase value of the CIR phase for each of the CIRs. The detector compares the phase signal with a target signal and detects the moving object in the channel based on the comparison.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: July 5, 2022
    Assignee: NXP B.V.
    Inventors: Stefan Tertinek, Salvatore Drago, Raf Lodewijk Jan Roovers
  • Publication number: 20220200654
    Abstract: A communication device and method include a reconfigurable receiver that is reconfigurable between communication, ranging and radar modes. The reconfigurable receiver includes a mixer configured to mix digital samples with a carrier phase estimate signal and configured to generate in-phase digital samples based on the carrier phase estimate. The reconfigurable receiver further includes a symbol correlator configured to correlate against the in-phase digital samples and generate correlated data, and a symbol binning unit configured to bin the correlated data and generate a first order channel impulse response estimate. The reconfigurable receiver yet further includes a multiplexer configured to switch the digital samples to the symbol binning unit when the reconfigurable receiver is configured in radar mode and to switch the correlated data to the symbol binning unit when the reconfigurable receiver is configured in a ranging mode.
    Type: Application
    Filed: December 17, 2018
    Publication date: June 23, 2022
    Inventors: Thomas Baier, Manuel Lafer, Gert Holler, Salvatore Drago
  • Publication number: 20220200308
    Abstract: A method for power management for applications having duty-cycled high peak supply currents includes charging a buffer capacitor with a first current supplied by a battery, wherein the first current is limited by a current limiter. A load is supplied with a second current supplied by the buffer capacitor, wherein the second current comprises a pulsed current. The current limiter is controlled with at least one of a plurality of sensor inputs to limit a capacity degradation of the battery.
    Type: Application
    Filed: December 22, 2020
    Publication date: June 23, 2022
    Inventors: Jan van Sinderen, Salvatore Drago, Gerard Villar Pique, Esa Petri Tarvainen, Wolfgang Hoess
  • Publication number: 20210359774
    Abstract: A moving object detector detects a moving object in a channel. The detection comprises the detector receiving a plurality of frames based on a transmitter transmitting a plurality of frames over a channel. One or more channel impulse responses (CIRs) of the channel is determined based on the received plurality of frames. The detector determines a CIR phase for each of the CIRs and a phase signal is formed based on a phase value of the CIR phase for each of the CIRs. The detector compares the phase signal with a target signal and detects the moving object in the channel based on the comparison.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 18, 2021
    Inventors: Stefan Tertinek, Salvatore Drago, Raf Lodewijk Jan Roovers
  • Patent number: 9571071
    Abstract: The invention relates to frequency synthesizer circuits, and in particular to frequency synthesizer circuits characterized by a small channel spacing. Embodiments disclosed include a frequency synthesizer circuit for a radio receiver, the circuit comprising: a digitally controlled oscillator configured to generate an output signal with an output frequency on application of an oscillator enable signal; a delay module; configured to delay an input reference signal to generate a delayed reference signal; and a duty cycle module configured to modulate the oscillator enable signal based on a period of an input reference signal and the delay of the delayed reference signal, such that a ratio between the output frequency and the frequency of the input reference signal is a non-integer.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: February 14, 2017
    Assignee: NXP B.V.
    Inventors: Tarik Saric, Salvatore Drago
  • Patent number: 9509290
    Abstract: A frequency converter, comprising a multi-phase local oscillator and a multi-phase mixer. The mixer comprises a plurality of mixer switches, each connected to a respective amplifier. The local oscillator is configured to provide a switching signal to each mixer switch, and comprises a plurality of inverters configured as a ring oscillator.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: November 29, 2016
    Assignee: NXP B.V.
    Inventors: Jan van Sinderen, Salvatore Drago
  • Patent number: 9331634
    Abstract: Apparatus and methods concern down-converting a radio frequency (RF) signal. As an example, one apparatus includes a first mixer and a second mixer. The first mixer down-converts an RF signal to produce a first intermediate frequency (IF) signal. The second mixer down-converts the first IF signal to produce a second IF signal having a plurality of phase components. The down-converter also includes a plurality of summing circuits. Each of the summing circuits is configured to combine various ones of the phase components of the second IF signal to produce a respective phase component of a third IF signal. The number of phase components in the third IF signal is different from the number of phase components in the second IF signal.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: May 3, 2016
    Assignee: NXP B.V.
    Inventors: Frank Leong, Salvatore Drago
  • Publication number: 20160036385
    Abstract: Apparatus and methods concern down-converting a radio frequency (RF) signal. As an example, one apparatus includes a first mixer and a second mixer. The first mixer down-converts an RF signal to produce a first intermediate frequency (IF) signal. The second mixer down-converts the first IF signal to produce a second IF signal having a plurality of phase components. The down-converter also includes a plurality of summing circuits. Each of the summing circuits is configured to combine various ones of the phase components of the second IF signal to produce a respective phase component of a third IF signal. The number of phase components in the third IF signal is different from the number of phase components in the second IF signal.
    Type: Application
    Filed: August 1, 2014
    Publication date: February 4, 2016
    Inventors: Frank Leong, Salvatore Drago
  • Patent number: 9240772
    Abstract: A low power frequency synthesizer circuit for a radio transceiver, the synthesizer circuit comprising: a digital controlled oscillator configured to generate an output signal (Fo) having a frequency controlled by an input digital control word (DCW); a feedback loop connected between an output and an input of the digital controlled oscillator, the feedback loop configured to provide the digital control word to the input of the digital controlled oscillator from an error derived from an input frequency control word (FCW) and the output signal; and a duty cycle module connected to the digital controlled oscillator and the feedback loop, the duty cycle module configured to generate a plurality of control signals to periodically enable and disable the digital controlled oscillator for a set fraction of clock cycles of an input reference clock signal (RefClock).
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: January 19, 2016
    Assignee: NXP, B.V.
    Inventors: Salvatore Drago, Fabio Sebastiano, Dominicus Martinus Wilhelmus Leenaerts, Lucien Johannes Breems, Bram Nauta
  • Publication number: 20160006421
    Abstract: The invention relates to frequency synthesiser circuits, and in particular to frequency synthesiser circuits characterised by a small channel spacing. Embodiments disclosed include a frequency synthesiser circuit (100) for a radio receiver, the circuit comprising: a digitally controlled oscillator (118) configured to generate an output signal (128) with an output frequency on application of an oscillator enable signal (126); a delay module (160; 210) configured to delay an input reference signal (142) to generate a delayed reference signal (144; 244); and a duty cycle module (150) configured to modulate the oscillator enable signal based on a period of an input reference signal (142) and the delay of the delayed reference signal (144), such that a ratio between the output frequency and the frequency of the input reference signal (142) is a non-integer.
    Type: Application
    Filed: June 23, 2015
    Publication date: January 7, 2016
    Inventors: Tarik Saric, Salvatore Drago
  • Publication number: 20150349755
    Abstract: A frequency converter, comprising a multi-phase local oscillator and a multi-phase mixer. The mixer comprises a plurality of mixer switches, each connected to a respective amplifier. The local oscillator is configured to provide a switching signal to each mixer switch, and comprises a plurality of inverters configured as a ring oscillator.
    Type: Application
    Filed: May 4, 2015
    Publication date: December 3, 2015
    Inventors: Jan van Sinderen, Salvatore Drago
  • Patent number: 9077361
    Abstract: A phase estimator comprising a first input terminal configured to receive a first analog input signal; a second input terminal configured to receive a second analog input signal, wherein the second analog input signal is 90° out of phase with the first analog input signal. The phase estimator is configured to provide a digital word representative of the phase of the first analog input signal and the second analog input signal. The phase estimator comprises a register configured to store N bits as a digital word a first reference signal generator, a second reference signal generator and a comparator.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: July 7, 2015
    Assignee: NXP B.V.
    Inventor: Salvatore Drago
  • Publication number: 20150180496
    Abstract: A phase estimator comprising a first input terminal configured to receive a first analogue input signal; a second input terminal configured to receive a second analogue input signal, wherein the second analogue input signal is 90° out of phase with the first analogue input signal. The phase estimator is configured to provide a digital word representative of the phase of the first analogue input signal and the second analogue input signal. The phase estimator comprises a register configured to store N bits as a digital word a first reference signal generator, a second reference signal generator and a comparator.
    Type: Application
    Filed: November 24, 2014
    Publication date: June 25, 2015
    Inventor: Salvatore Drago
  • Patent number: 8620394
    Abstract: Communication networks are implemented using a variety of devices and methods. In a particular embodiment for use in a communication network having RF-communication devices that communicate using a RF protocol, an RF-communication device is implemented with an RF transceiver (110) to communicate over the network using the RF protocol and being controllable in a reduced power-consumption mode in which the RF transceiver does not communicate over the network. The device also includes an RF receiver (104, 106) including an envelope detector (104) and a pulse generator circuit (106). The envelope detector circuit (104) providing an envelope-based signal to a pulse generator circuit (106) that, in response to the envelope-based signal and after generating a number of pulses that exceeds a predetermined number of pulses, prompts the RF transceiver (110) to transition out of the reduced power-consumption mode.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: December 31, 2013
    Assignee: NXP, B.V.
    Inventors: Fabio Sebastiano, Salvatore Drago, Lucien Johannes Breems, Dominicus Martinues Wilhelmus Leenaerts
  • Publication number: 20120139587
    Abstract: A low power frequency synthesiser circuit (30) for a radio transceiver, the synthesiser circuit comprising: a digital controlled oscillator (33) configured to generate an output signal (F0) having a frequency controlled by an input digital control word (DCW); a feedback loop (35-38) connected between an output and an input of the digital controlled oscillator, the feedback loop configured to provide the digital control word to the input of the digital controlled oscillator from an error derived from an input frequency control word (FCW) and the output signal; and a duty cycle module (32) connected to the digital controlled oscillator and the feedback loop, the duty cycle module configured to generate a plurality of control signals to periodically enable and disable the digital controlled oscillator for a set fraction of clock cycles of an input reference clock signal (RefClock).
    Type: Application
    Filed: March 30, 2010
    Publication date: June 7, 2012
    Applicant: NXP B.V.
    Inventors: Salvatore Drago, Fabio Sebastiano, Dominicus Martinus Wilhelmus Leenaerts, Lucien Johannes Breems, Bram Nauta
  • Publication number: 20100216523
    Abstract: Communication networks are implemented using a variety of devices and methods. In a particular embodiment for use in a communication network having RF-communication devices that communicate using a RF protocol, an RF-communication device is implemented with an RF transceiver (110) to communicate over the network using the RF protocol and being controllable in a reduced power-consumption mode in which the RF transceiver does not communicate over the network. The device also includes an RF receiver (104, 106) including an envelope detector (104) and a pulse generator circuit (106). The envelope detector circuit (104) providing an envelope-based signal to a pulse generator circuit (106) that, in response to the envelope-based signal and after generating a number of pulses that exceeds a predetermined number of pulses, prompts the RF transceiver (110) to transition out of the reduced power-consumption mode.
    Type: Application
    Filed: October 2, 2008
    Publication date: August 26, 2010
    Applicant: NXP B.V.
    Inventors: Fabio Sebastiano, Salvatore Drago, Lucien Johannes Breems, Dominicus Martinues Wilhelmus Leenaerts
  • Patent number: 6571256
    Abstract: A method of providing only pre-screened content is described. The method includes maintaining a database on a server including a plurality of pre-screened sites. When a universal resource locator (URL) is received, the method verifies that the URL represents one of the plurality of pre-screened sites. If the URL represents one of the plurality of prescreened sites, displaying data associated with the URL, otherwise, not displaying the data.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: May 27, 2003
    Assignee: Thekidsconnection.com, Inc.
    Inventors: Paul Jacob Dorian, Joseph Salvatore Drago, Peter Dorian