Patents by Inventor Salvatore Lombardo
Salvatore Lombardo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10700220Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.Type: GrantFiled: December 20, 2018Date of Patent: June 30, 2020Assignee: STMICROELECTRONICS S.R.L.Inventors: Massimo Cataldo Mazzillo, Piero Fallica, Salvatore Lombardo
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Publication number: 20190172961Abstract: Solar thin film modules are provided with reduced lateral dimensions of isolation trenches and contact trenches, which provide for a series connection of the individual solar cells. To this end lithography and etch techniques are applied to pattern the individual material layers, thereby reducing parasitic shunt leakages compared to conventional laser scribing techniques. In particular, there may be series connected solar cells formed on a flexible substrate material that are highly efficient in indoor applications.Type: ApplicationFiled: January 24, 2019Publication date: June 6, 2019Inventors: Marina Foti, Cosimo Gerardi, Salvatore Lombardo, Sebastiano Ravesi, NoemiGraziana Sparta', Silvestra Dimarco
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Publication number: 20190148568Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.Type: ApplicationFiled: December 20, 2018Publication date: May 16, 2019Inventors: Massimo Cataldo MAZZILLO, Piero FALLICA, Salvatore LOMBARDO
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Publication number: 20190114341Abstract: Generic runtime protection for transactional data may be provided by accessing a list of tables of a database, modifying each table of the list of tables by adding a field that indicates a blocking status of each row in the table, and generating an access control list (ACL) function for each table of the list of tables. When a query is executed on a table of the list of tables, rows that are blocked for the querying user are not returned even if they are responsive to the query, based on the generic ACL function for the table.Type: ApplicationFiled: October 12, 2017Publication date: April 18, 2019Inventors: Igor Schukovets, Salvatore Lombardo, Gregor Tielsch, Alexander Krasinskiy, Guenter Schmidt, Marcel Hermanns, Nils Hartmann, Marco Ziegler
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Patent number: 10256356Abstract: Solar thin film modules are provided with reduced lateral dimensions of isolation trenches and contact trenches, which provide for a series connection of the individual solar cells. To this end lithography and etch techniques are applied to pattern the individual material layers, thereby reducing parasitic shunt leakages compared to conventional laser scribing techniques. In particular, there may be series connected solar cells formed on a flexible substrate material that are highly efficient in indoor applications.Type: GrantFiled: November 23, 2015Date of Patent: April 9, 2019Assignee: STMicroelectronics S.r.l.Inventors: Marina Foti, Noemi Graziana Sparta′, Salvatore Lombardo, Silvestra DiMarco, Sebastiano Ravesi, Cosimo Gerardi
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Patent number: 10205036Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.Type: GrantFiled: January 11, 2018Date of Patent: February 12, 2019Assignee: STMICROELECTRONICS S.R.L.Inventors: Massimo Cataldo Mazzillo, Piero Fallica, Salvatore Lombardo
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Patent number: 10103281Abstract: A thin film amorphous silicon solar cell may have front contact between a hydrogenated amorphous silicon layer and a transparent conductive oxide layer. The cell may include a layer of a refractory metal, chosen among the group composed of molybdenum, tungsten, tantalum and titanium, of thickness adapted to ensure a light transmittance of at least 80%, interposed therebetween, before growing by PECVD a hydrogenated amorphous silicon p-i-n light absorption layer over it. A refractory metal layer of just about 1 nm thickness may effectively shield the oxide from the reactive plasma, thereby preventing a diffused defect when forming the p.i.n. layer that would favor recombination of light-generated charge carriers.Type: GrantFiled: August 29, 2012Date of Patent: October 16, 2018Assignee: STMICROELECTRONICS S.R.L.Inventors: Salvatore Lombardo, Cosimo Gerardi, Sebastiano Ravesi, Marina Foti, Cristina Tringali, Stella Loverso, Nicola Costa
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Publication number: 20180138327Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.Type: ApplicationFiled: January 11, 2018Publication date: May 17, 2018Inventors: Massimo Cataldo MAZZILLO, Piero FALLICA, Salvatore LOMBARDO
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Patent number: 9899544Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.Type: GrantFiled: March 3, 2017Date of Patent: February 20, 2018Assignee: STMICROELECTRONICS S.R.L.Inventors: Massimo Cataldo Mazzillo, Piero Fallica, Salvatore Lombardo
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Publication number: 20180033895Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.Type: ApplicationFiled: March 3, 2017Publication date: February 1, 2018Inventors: Massimo Cataldo Mazzillo, Piero Fallica, Salvatore Lombardo
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Publication number: 20160079457Abstract: Solar thin film modules are provided with reduced lateral dimensions of isolation trenches and contact trenches, which provide for a series connection of the individual solar cells. To this end lithography and etch techniques are applied to pattern the individual material layers, thereby reducing parasitic shunt leakages compared to conventional laser scribing techniques. In particular, there may be series connected solar cells formed on a flexible substrate material that are highly efficient in indoor applications.Type: ApplicationFiled: November 23, 2015Publication date: March 17, 2016Inventors: MARINA FOTI, NOEMI GRAZIANA SPARTA', SALVATORE LOMBARDO, SILVESTRA DIMARCO, SEBASTIANO RAVESI, COSIMO GERARDI
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Publication number: 20160079453Abstract: A thin film amorphous silicon solar cell may have front contact between a hydrogenated amorphous silicon layer and a transparent conductive oxide layer. The cell may include a layer of a refractory metal, chosen among the group composed of molybdenum, tungsten, tantalum and titanium, of thickness adapted to ensure a light transmittance of at least 80%, interposed therebetween, before growing by PECVD a hydrogenated amorphous silicon p-i-n light absorption layer over it. A refractory metal layer of just about 1 nm thickness may effectively shield the oxide from the reactive plasma, thereby preventing a diffused defect when forming the p.i.n. layer that would favor recombination of light-generated charge carriers.Type: ApplicationFiled: November 23, 2015Publication date: March 17, 2016Inventors: SALVATORE LOMBARDO, COSIMO GERARDI, SEBASTIANO RAVESI, MARINA FOTI, CRISTINA TRINGALI, STELLA LOVERSO, NICOLA COSTA
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Patent number: 9276149Abstract: Solar thin film modules are provided with reduced lateral dimensions of isolation trenches and contact trenches, which provide for a series connection of the individual solar cells. To this end lithography and etch techniques are applied to pattern the individual material layers, thereby reducing parasitic shunt leakages compared to conventional laser scribing techniques. In particular, there may be series connected solar cells formed on a flexible substrate material that are highly efficient in indoor applications.Type: GrantFiled: July 24, 2012Date of Patent: March 1, 2016Assignee: STMICROELECTRONICS S.R.L.Inventors: Marina Foti, Noemi Graziana Sparta, Salvatore Lombardo, Silvestra Dimarco, Sebastiano Ravesi, Cosimo Gerardi
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Patent number: 9006558Abstract: A solar panel may include a first multi-cell thin-film photovoltaic module of a first fabrication type including a transparent support forming a front surface of the panel, a first pair of connection terminals on the transparent support, and first cells of a certain area, being on the transparent support, and being connected in series to the first pair of connection terminals. The solar panel may include a second multi-cell thin-film photovoltaic module of a second fabrication type comprising a support forming a rear surface of the panel, a second pair of connection terminals on the support, and second cells of a certain area, being on the support, and being connected in series to the second pair of connection terminals.Type: GrantFiled: February 11, 2010Date of Patent: April 14, 2015Assignee: STMicroelectronics S.R.L.Inventors: Salvatore Lombardo, Salvatore Coffa
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Publication number: 20130048071Abstract: A thin film amorphous silicon solar cell may have front contact between a hydrogenated amorphous silicon layer and a transparent conductive oxide layer. The cell may include a layer of a refractory metal, chosen among the group composed of molybdenum, tungsten, tantalum and titanium, of thickness adapted to ensure a light transmittance of at least 80%, interposed therebetween, before growing by PECVD a hydrogenated amorphous silicon p-i-n light absorption layer over it. A refractory metal layer of just about 1 nm thickness may effectively shield the oxide from the reactive plasma, thereby preventing a diffused defect when forming the p.i.n. layer that would favor recombination of light-generated charge carriers.Type: ApplicationFiled: August 29, 2012Publication date: February 28, 2013Applicant: STMicroelectronics S.r.I.Inventors: Salvatore LOMBARDO, Cosimo GERARDI, Sebastiano RAVESI, Marina FOTI, Cristina TRINGALI, Stella LOVERSO, Nicola COSTA
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Publication number: 20130032197Abstract: Solar thin film modules are provided with reduced lateral dimensions of isolation trenches and contact trenches, which provide for a series connection of the individual solar cells. To this end lithography and etch techniques are applied to pattern the individual material layers, thereby reducing parasitic shunt leakages compared to conventional laser scribing techniques. In particular, there may be series connected solar cells formed on a flexible substrate material that are highly efficient in indoor applications.Type: ApplicationFiled: July 24, 2012Publication date: February 7, 2013Applicant: STMicroelectronics S.r.I.Inventors: MARINA FOTI, NOEMI GRAZIANA SPARTA, SALVATORE LOMBARDO, SILVESTRA DIMARCO, SEBASTIANO RAVESI, COSIMO GERARDI
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Publication number: 20100200043Abstract: A solar panel may include a first multi-cell thin-film photovoltaic module of a first fabrication type including a transparent support forming a front surface of the panel, a first pair of connection terminals on the transparent support, and first cells of a certain area, being on the transparent support, and being connected in series to the first pair of connection terminals. The solar panel may include a second multi-cell thin-film photovoltaic module of a second fabrication type comprising a support forming a rear surface of the panel, a second pair of connection terminals on the support, and second cells of a certain area, being on the support, and being connected in series to the second pair of connection terminals.Type: ApplicationFiled: February 11, 2010Publication date: August 12, 2010Applicant: STMicroelectronics S.r.l.Inventors: Salvatore Lombardo, Salvatore Coffa
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Publication number: 20070181870Abstract: A nanometric device is disclosed for the measurement of the electrical conductivity of individual molecules and their quantum effects having: a substrate surmounted by, in order, a barrier to diffusion layer, an electrically conductive layer, a “bounder” layer and an electrically insulating layer; and a suitable miniaturized probe; wherein the “bounder” layer and the electrically insulating layer have at least one nanometric pore formed within, the base of which consists of the electrically conductive layer. A method for the production of a nanometric device for the measurement of the electrical conductivity of individual molecules and their quantum effects, and a method for the measurement of the electrical conductivity and quantum effects of a molecule of interest, are also disclosed.Type: ApplicationFiled: January 18, 2007Publication date: August 9, 2007Applicant: Consiglio Nazionale delle RicercheInventors: Sebania Libertino, Rosaria Puglisi, Manuela Fichera, Salvatore Lombardo, Rosario Spinella
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Patent number: 6772992Abstract: This invention relates to a memory cell which comprises a capacitor having a first electrode and a second electrode separated by a dielectric layer. Such dielectric layer comprises a layer of a semi-insulating material which is fully enveloped by an insulating material and in which an electric charge is permanently present or trapped therein. Such electric charge accumulated close to the first or to the second electrode, depending on the electric field between the electrodes, thereby defining different logic levels.Type: GrantFiled: November 30, 2000Date of Patent: August 10, 2004Assignee: STMicroelectronics S.R.L.Inventors: Salvatore Lombardo, Cosimo Gerardi, Isodiana Crupi, Massimo Melanotte
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Publication number: 20040004270Abstract: A vertical structure high carrier mobility transistor on a substrate of crystalline silicon doped with impurities of the N type, the transistor having a collector region located at a lower portion of the substrate. The transistor includes a heterostructure alloy region positioned in the substrate and comprised of a heterostructure alloy of silicon and germanium. A base region is positioned in the substrate above the first conducting region and doped with P-type impurities. A first dielectric layer is positioned on, and directly contacts, the heterostructure alloy region, and defines a first window directly above the heterostructure alloy region. The transistor also includes an emitter positioned in the heterostructure alloy region and between the first window and the base region. The emitter is comprised of the heterostructure alloy doped with impurities of the first type and directly contacts the first dielectric layer.Type: ApplicationFiled: July 7, 2003Publication date: January 8, 2004Applicant: STMicroelectronics S.r.l.Inventors: Salvatore Lombardo, Maria Concetta Nicotra, Angelo Pinto