Patents by Inventor Sam Komarapalayam Karikalan

Sam Komarapalayam Karikalan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10615110
    Abstract: Semiconductor devices and manufacturing methods are provided for using a Recon interposer that provides a high density interface between the active semiconductor die and the semiconductor substrate and also provides the pitch fan-out. For example, a circuit assembly includes a silicon pad layer including a plurality of metal pads, each metal pad configured to receive a corresponding bump of a plurality of bumps. The circuit assembly further includes an oxide layer disposed on the silicon pad layer and an interposer dielectric layer disposed on the oxide layer. The interposer dielectric layer includes a plurality of routing traces that connect a top surface of the redistribution layer to a bottom surface of the interposer dielectric layer.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: April 7, 2020
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Sam Ziqun Zhao, Sam Komarapalayam Karikalan, Edward Law, Rezaur Rahman Khan, Pieter Vorenkamp
  • Publication number: 20180308791
    Abstract: Semiconductor devices and manufacturing methods are provided for using a Recon interposer that provides a high density interface between the active semiconductor die and the semiconductor substrate and also provides the pitch fan-out. For example, a circuit assembly includes a silicon pad layer including a plurality of metal pads, each metal pad configured to receive a corresponding bump of a plurality of bumps. The circuit assembly further includes an oxide layer disposed on the silicon pad layer and an interposer dielectric layer disposed on the oxide layer. The interposer dielectric layer includes a plurality of routing traces that connect a top surface of the redistribution layer to a bottom surface of the interposer dielectric layer.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Sam Ziqun ZHAO, Sam Komarapalayam KARIKALAN, Edward LAW, Rezaur Rahman KHAN, Pieter VORENKAMP
  • Patent number: 10008439
    Abstract: Semiconductor devices and manufacturing methods are provided for using a Recon interposer that provides a high density interface between the active semiconductor die and the semiconductor substrate and also provides the pitch fan-out. For example, a circuit assembly includes a silicon pad layer including a plurality of metal pads, each metal pad configured to receive a corresponding bump of a plurality of bumps. The circuit assembly further includes an oxide layer disposed on the silicon pad layer and an interposer dielectric layer disposed on the oxide layer. The interposer dielectric layer includes a plurality of routing traces that connect a top surface of the redistribution layer to a bottom surface of the interposer dielectric layer.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: June 26, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Sam Ziqun Zhao, Sam Komarapalayam Karikalan, Edward Law, Rezaur Rahman Khan, Pieter Vorenkamp
  • Publication number: 20170011993
    Abstract: Semiconductor devices and manufacturing methods are provided for using a Recon interposer that provides a high density interface between the active semiconductor die and the semiconductor substrate and also provides the pitch fan-out. For example, a circuit assembly includes a silicon pad layer including a plurality of metal pads, each metal pad configured to receive a corresponding bump of a plurality of bumps. The circuit assembly further includes an oxide layer disposed on the silicon pad layer and an interposer dielectric layer disposed on the oxide layer. The interposer dielectric layer includes a plurality of routing traces that connect a top surface of the redistribution layer to a bottom surface of the interposer dielectric layer.
    Type: Application
    Filed: July 8, 2016
    Publication date: January 12, 2017
    Applicant: Broadcom Corporation
    Inventors: Sam Ziqun ZHAO, Sam Komarapalayam Karikalan, Edward Law, Rezaur Rahman Khan, Pieter Vorenkamp