Patents by Inventor Sam Povilus
Sam Povilus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12693845Abstract: This application is directed to managing firmware control data stored in a memory device of an electronic device. The electronic device obtains a current data descriptor map (DDM) corresponding to a current version of a firmware program, and identifies, in the memory device, a prior DDM and a prior control data structure corresponding to a prior version of the firmware program. Each of the prior and current DDMs maps a plurality of data descriptors to a plurality of locations in a respective control data structure. The prior control data structure stores a plurality of prior control data items identified by a plurality of prior data descriptors. A current control data structure is automatically generated for the current version of the firmware program based on the prior control data structure, the current DDM, and the prior DDM, and stores a plurality of current control data items identified by the data descriptors.Type: GrantFiled: November 10, 2023Date of Patent: July 28, 2026Assignee: SK Hynix NAND Product Solutions Corp.Inventors: Sam Povilus, Cody Dinges, Karl Heichelheim
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Publication number: 20260203045Abstract: A system and related method, including a first processor core, a second processor core and a control circuitry to receive requests to update existing firmware of the first processor core to a new firmware. The control circuitry loads existing firmware onto the second processor core and migrates data associated with the existing firmware on the first processor core to the second processor core. The control circuitry stops the transaction execution by the first processor core while causing the second processor core to execute transactions in place of the first processor core. The control circuitry restarts the first processor core, replaces the existing firmware on the first processor core with the new firmware, and migrates data of the existing firmware on the second processor core to the first processor core. The control circuitry stops the transaction execution of the second processor core and causes the first processor core to execute transactions.Type: ApplicationFiled: March 13, 2026Publication date: July 16, 2026Inventors: Timothy Hallett, Bindu Madhavi Khambam, Kailaash Rajagopalan, Mahesh Govindane, Matthew Fitzpatrick, Sam Povilus, John Nolan, Jonathan M. Hughes
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Patent number: 12596546Abstract: A system and related method, including a first processor core, a second processor core and a control circuitry to receive requests to update existing firmware of the first processor core to a new firmware. The control circuitry loads existing firmware onto the second processor core and migrates data associated with the existing firmware on the first processor core to the second processor core. The control circuitry stops the transaction execution by the first processor core while causing the second processor core to execute transactions in place of the first processor core. The control circuitry restarts the first processor core, replaces the existing firmware on the first processor core with the new firmware, and migrates data of the existing firmware on the second processor core to the first processor core. The control circuitry stops the transaction execution of the second processor core and causes the first processor core to execute transactions.Type: GrantFiled: May 24, 2024Date of Patent: April 7, 2026Assignee: SK Hynix NAND Product Solutions Corp.Inventors: Timothy Hallett, Bindu Madhavi Khambam, Kailaash Rajagopalan, Mahesh Govindane, Matthew Fitzpatrick, Sam Povilus, John Nolan, Jonathan M. Hughes
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Patent number: 12561076Abstract: A method for updating a device includes receiving an instruction to update from a first configuration in the device to a second configuration, where a first heap memory allocated to the first configuration includes multiple first allocated memory blocks and corresponding first memory blocks metadata. The method also includes performing a warm reset, the reset including determining, based on the first memory blocks metadata, that when updating from the first configuration to the second configuration, data of at least one of the first allocated memory blocks should be persisted to a second heap memory allocated to the second configuration, and causing the device to update from the first configuration to the second configuration, where the update includes persisting, based on the first memory blocks metadata, the data of at least one of the first allocated memory blocks to a second heap memory allocated to the second configuration.Type: GrantFiled: June 18, 2024Date of Patent: February 24, 2026Assignee: SK Hynix NAND Product Solutions Corp.Inventors: Matthew Fitzpatrick, Craig Valine, Kailaash Rajagopalan, Mahesh Govindane, Sam Povilus
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Publication number: 20250383798Abstract: A method for updating a device includes receiving an instruction to update from a first configuration in the device to a second configuration, where a first heap memory allocated to the first configuration includes multiple first allocated memory blocks and corresponding first memory blocks metadata. The method also includes performing a warm reset, the reset including determining, based on the first memory blocks metadata, that when updating from the first configuration to the second configuration, data of at least one of the first allocated memory blocks should be persisted to a second heap memory allocated to the second configuration, and causing the device to update from the first configuration to the second configuration, where the update includes persisting, based on the first memory blocks metadata, the data of at least one of the first allocated memory blocks to a second heap memory allocated to the second configuration.Type: ApplicationFiled: June 18, 2024Publication date: December 18, 2025Inventors: Matthew Fitzpatrick, Craig Valine, Kailaash Rajagopalan, Mahesh Govindane, Sam Povilus
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Publication number: 20250156170Abstract: This application is directed to managing firmware control data stored in a memory device of an electronic device. The electronic device obtains a current data descriptor map (DDM) corresponding to a current version of a firmware program, and identifies, in the memory device, a prior DDM and a prior control data structure corresponding to a prior version of the firmware program. Each of the prior and current DDMs maps a plurality of data descriptors to a plurality of locations in a respective control data structure. The prior control data structure stores a plurality of prior control data items identified by a plurality of prior data descriptors. A current control data structure is automatically generated for the current version of the firmware program based on the prior control data structure, the current DDM, and the prior DDM, and stores a plurality of current control data items identified by the data descriptors.Type: ApplicationFiled: November 10, 2023Publication date: May 15, 2025Inventors: Sam POVILUS, Cody DINGES, Karl HEICHELHEIM
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Publication number: 20240311141Abstract: A system and related method, including a first processor core, a second processor core and a control circuitry to receive requests to update existing firmware of the first processor core to a new firmware. The control circuitry loads existing firmware onto the second processor core and migrates data associated with the existing firmware on the first processor core to the second processor core. The control circuitry stops the transaction execution by the first processor core while causing the second processor core to execute transactions in place of the first processor core. The control circuitry restarts the first processor core, replaces the existing firmware on the first processor core with the new firmware, and migrates data of the existing firmware on the second processor core to the first processor core. The control circuitry stops the transaction execution of the second processor core and causes the first processor core to execute transactions.Type: ApplicationFiled: May 24, 2024Publication date: September 19, 2024Inventors: Timothy Hallett, Bindu Madhavi Khambam, Kailaash Rajagopalan, Mahesh Govindane, Matthew Fitzpatrick, Sam Povilus, John Nolan, Jonathan M. Hughes
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Patent number: 12026506Abstract: A system and related method, including a first processor core, a second processor core and a control circuitry to receive requests to update existing firmware of the first processor core to a new firmware. The control circuitry loads existing firmware onto the second processor core and migrates data associated with the existing firmware on the first processor core to the second processor core. The control circuitry stops the transaction execution by the first processor core while causing the second processor core to execute transactions in place of the first processor core. The control circuitry restarts the first processor core, replaces the existing firmware on the first processor core with the new firmware, and migrates data of the existing firmware on the second processor core to the first processor core. The control circuitry stops the transaction execution of the second processor core and causes the first processor core to execute transactions.Type: GrantFiled: July 8, 2022Date of Patent: July 2, 2024Assignee: SK Hynix NAND Product Solutions Corp.Inventors: Timothy Hallett, Bindu Madhavi Khambam, Kailaash Rajagopalan, Mahesh Govindane, Matthew Fitzpatrick, Sam Povilus, John Nolan, Jonathan M. Hughes
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Publication number: 20240012635Abstract: A system and related method, including a first processor core, a second processor core and a control circuitry to receive requests to update existing firmware of the first processor core to a new firmware. The control circuitry loads existing firmware onto the second processor core and migrates data associated with the existing firmware on the first processor core to the second processor core. The control circuitry stops the transaction execution by the first processor core while causing the second processor core to execute transactions in place of the first processor core. The control circuitry restarts the first processor core, replaces the existing firmware on the first processor core with the new firmware, and migrates data of the existing firmware on the second processor core to the first processor core. The control circuitry stops the transaction execution of the second processor core and causes the first processor core to execute transactions.Type: ApplicationFiled: July 8, 2022Publication date: January 11, 2024Inventors: Timothy Hallett, Bindu Madhavi Khambam, Kailaash Rajagopalan, Mahesh Govindane, Matthew Fitzpatrick, Sam Povilus, John Nolan, Jonathan M. Hughes