Abstract: An encoder for encoding four bits of uncompressed data in one clock cycle generates one code or in parallel a plurality of codes if the bits can be represented by a code or by a plurality of codes and keeps the bits that can not be represented by a code unaltered. On the following clock cycle, the unaltered bits from the previous clock cycle will be combined with a new set of four bits of data and the cumulative bits will be converted to a code if they can be represented by a code and if they can not be represented by a code, they will be stored until the next clock cycle. The process of storing the cumulative number of bits will be continued until the cumulative number of bits can be represented by a code.

Abstract: A method is described for determining readiness of devices in a digital data bus system to transfer data signals. The bus system includes a bus having a clock line for communicating a clock signal, address lines for communicating address signals, data lines for communicating data signals, and control lines for communicating control signals. The bus system also includes a plurality of devices. Each device is connected to the bus and has an address on the bus. At least one device is a source device capable of sending data signals and at least one device is a destination device capable of receiving data signals. A bus controller connects to the bus and controls the bus. The control lines include bus request lines that connect each device to the bus controller for communicating a bus request signal from a device to the bus controller. The bus request signal indicates that the device is ready to send or receive data signals.