Patents by Inventor Sam SCALISE

Sam SCALISE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240028336
    Abstract: In one set of embodiments, an operating system (OS) kernel of a computer system can receive an invocation of a system call by a user program running on the computer system. The OS kernel can further fetch a plurality of subsequent instructions that will be executed by the user program after the invocation of the system call and decode the plurality of subsequent instructions into a plurality of decoded instructions. The OS kernel can then analyze whether the plurality of decoded instructions include an additional system call invocation and whether other decoded instructions that appear between the invocation of the system call and the additional system call invocation are viable for emulation by the OS kernel.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Inventors: Frederick Joseph Jacobs, Sam Scalise, Martim Carbone
  • Publication number: 20240028361
    Abstract: An example method of virtualized cache allocation for a virtualized computing system includes: providing, by a hypervisor for a virtual machine (VM), a virtual shared cache, the virtual shared cache backed by a physical shared cache of a processor; providing, by the hypervisor to the VM, virtual service classes and virtual service class bit masks; mapping, by the hypervisor, the virtual service classes to physical service classes of the processor; associating, by the hypervisor, a shift factor with the virtual service class bit masks with respect to physical service class bit masks of the processor; and configuring, by the hypervisor, service class registers and service class bit mask registers of the processor based on the mapping and the shift factor in response to configuration of the virtual shared cache by the VM.
    Type: Application
    Filed: July 20, 2022
    Publication date: January 25, 2024
    Inventors: Phani Kishore GADEPALLI, Xunjia LU, James Kenneth WHITE, Sam SCALISE
  • Publication number: 20240028359
    Abstract: In one set of embodiments, new hardware-assisted virtualization features for a CPU are provided that include, among other things: (1) a new control structure that allows a kernel level hypervisor component to set, for each configurable property/setting maintained in an existing control structure, whether the property/setting is accessible from an unprivileged hypervisor mode of the CPU, (2) another new control structure that allows the kernel level hypervisor component to set, for each of a plurality of guest events or operations, whether the guest event or operation will cause a transition from a privileged or unprivileged guest mode of the CPU to the unprivileged hypervisor mode, and (3) the ability for the CPU to transition directly from the unprivileged hypervisor mode to the privileged or unprivileged guest mode.
    Type: Application
    Filed: July 19, 2022
    Publication date: January 25, 2024
    Inventors: Sam Scalise, Frederick Joseph Jacobs, James Kenneth White
  • Publication number: 20230036017
    Abstract: An example method of determining size of virtual last-level cache (LLC) exposed to a virtual machine (VM) supported by a hypervisor executing on a host computer includes: obtaining, by the hypervisor, a host topology of the host computer, the host topology including a number of LLCs in a central processing unit (CPU) of the host computer and a host LLC size being a size of each of the LLCs in the CPU; obtaining, by the hypervisor, a virtual socket size for a virtual socket presented to the VM by the hypervisor and a virtual non-uniform memory access (NUMA) node size presented to the VM by the hypervisor; determining, by the hypervisor, a virtual LLC size for the VM based on the host topology, the virtual socket size, the virtual NUMA node size, and a plurality of constraints; and presenting, to the VM, the virtual LLC size in processor feature discovery information.
    Type: Application
    Filed: July 21, 2021
    Publication date: February 2, 2023
    Inventors: Xunjia LU, Yifan HAO, Sam SCALISE