Patents by Inventor Sam Shichijo

Sam Shichijo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Higher voltage transistors for sub micron CMOS processes
    Publication number: 20030127694
    Abstract: An integrated circuit drain extension transistor for sub micron CMOS processes. A transistor gate (40) is formed over a CMOS n-well region (80) and a CMOS p-well region (70) in a silicon substrate (10). Transistor source regions (50),(140) and drain regions (55),(145) are formed in the various CMOS well regions to form drain extension transistors where the CMOS well regions (70),(80) serve as the drain extension regions of the transistors.
    Type: Application
    Filed: December 13, 2002
    Publication date: July 10, 2003
    Inventors: Alec Morton, Taylor Efland, Chin-Yu Tsai, Jozef C. Mitros, Dan M. Mosher, Sam Shichijo, Keith Kunz
  • Higher voltage transistors for sub micron CMOS processes
    Patent number: 6548874
    Abstract: An intergrated circuit drain extension transistor for sub micron CMOS processes. A transistor gate (40) is formed over a CMOS n-well region (80) and a CMOS p-well region (70) in a silicon substrate (10). Transistor source regions (50), (140) and drain regions (55), (145) are formed in the various CMOS well regions to form drain extension transistors where the CMOS well regions (70), (80) serve as the drain extension regions of the transistor.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: April 15, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Alec Morton, Taylor Efland, Chin-yu Tsai, Jozef C. Mitros, Dan M. Mosher, Sam Shichijo, Keith Kunz