Patents by Inventor Sam Ziqun Zhao
Sam Ziqun Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7432586Abstract: An apparatus and method for enhancing thermal performance and electromagnetic interference (EMI) shielding in die-up array integrated circuit (IC) device packages is presented. A die-up array package includes an IC die mounted to a first stiffener surface. The package further includes a cap body having first and second surfaces. A first portion of the second surface has a cavity formed therein, and a planar second portion of the second surface is coupled to the first stiffener surface. The package further includes a substrate having a first surface coupled to a second stiffener surface. A plurality of contact pads on the first substrate surface are electrically connected to an array of electrically conductive terminals on a second substrate surface. The stiffener and cap body form a die enclosure that dissipates heat during operation of the IC die, and shields EMI emanating from and radiating toward the IC die.Type: GrantFiled: June 21, 2004Date of Patent: October 7, 2008Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Reza-ur Rahman Khan
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Publication number: 20080211089Abstract: Methods and apparatus for improved electrical, mechanical and thermal performance of stacked IC packages are described. An IC package comprises a substrate, a first die, a second die, and an interposer with an opening in a first surface of the interposer configured to accommodate the first die. The first IC die is attached a first surface of the substrate. The interposer is mounted on the first surface of the substrate such that the first IC die is placed within the opening in the interposer. The second die is mounted on a second surface of the interposer. Wire bonds couple bond pads on the first surfaces of IC die are coupled to the first surface of the substrate. A mold compound encapsulates the first IC die, the second IC die, the interposer and the wire bonds.Type: ApplicationFiled: February 16, 2007Publication date: September 4, 2008Applicant: Broadcom CorporationInventors: Rezaur Rahman Khan, Sam Ziqun Zhao
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Patent number: 7402906Abstract: An apparatus, system, and method for assembling a ball grid array (BGA) package is described. A stiffener/heat spreader is provided. A substrate has a first surface and a second surface. The substrate has a central window-shaped aperture that extends through the substrate from the first substrate surface to the second substrate surface. The first substrate surface is attached to a surface of the stiffener/heat spreader. A portion of the stiffener/heat spreader is accessible through the central window-shaped aperture. An IC die has a first surface and a second surface. The first IC die surface is mounted to the accessible portion of the stiffener/heat spreader. A drop-in heat spreader has a surface that is mounted to the second IC die surface.Type: GrantFiled: July 15, 2004Date of Patent: July 22, 2008Assignee: Broadcom CorporationInventors: Reza-ur Rahman Khan, Sam Ziqun Zhao
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Publication number: 20080096312Abstract: Methods and apparatuses for improved thermal, electrical and/or mechanical performance in integrated circuit (IC) packages are described. An IC circuit package comprises a substrate having a central opening. An IC die, resides within the opening in the substrate. Wirebonds couples a plurality of bond pads on a top surface of the IC die to a plurality of bond fingers on a top surface the substrate. An encapsulating material encapsulates at least the IC die and the wirebonds such that at least a bottom surface of the IC die is left exposed. The encapsulating material suspends the die such that at least a portion of the die is held within the opening in the substrate.Type: ApplicationFiled: October 20, 2006Publication date: April 24, 2008Applicant: Broadcom CorporationInventors: Edward Law, Sam Ziqun Zhao, Rezaur Rahman Khan
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Publication number: 20070290322Abstract: Methods and apparatuses for improved integrated circuit (IC) packages are described herein. In an aspect, an IC device package includes an IC die having a contact pad, where the contact pad is located on a hotspot of the IC die. The hotspot is thermally coupled to a thermal interconnect member. In an aspect, the package is encapsulated in a mold compound. In a further aspect, a heat spreader is attached to the mold compound, and is thermally coupled to the thermal interconnect member. In another aspect, a thermal interconnect member thermally is coupled between the heat spreader and the substrate.Type: ApplicationFiled: September 5, 2006Publication date: December 20, 2007Applicant: Broadcom CorporationInventors: Sam Ziqun Zhao, Rezaur Rahman Khan
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Publication number: 20070290376Abstract: Methods, systems, and apparatuses for integrated circuit (IC) package vertical interconnection are described herein. In an aspect of the invention, an IC package includes an IC die with contact pads. The IC package also includes interconnect members which are coupled to the die at the contact pads. An encapsulating material encapsulates the IC die and the interconnect members such that a contact surface of each interconnect member is accessible at a surface of the encapsulating material. A second IC package is coupled to the first IC package through the plurality of interconnect members of the first IC package. In an example, solder balls attached to a bottom of the second IC package are coupled to the contact surfaces of the interconnect members to couple the first IC package and the second IC package.Type: ApplicationFiled: October 30, 2006Publication date: December 20, 2007Applicant: Broadcom CorporationInventors: Sam Ziqun Zhao, Rezaur Rahman Khan
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Publication number: 20070278632Abstract: Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in integrated circuit (IC) packages is described. A die-up or die-down package includes first and second caps defining a cavity, an IC die, and a leadframe. The leadframe includes a centrally located die attach pad, a plurality of leads, and a plurality of tie bars that couple the die attach pad to the leads. The IC die is mounted to the die attach pad. Planar rim portions of the first and second caps that surround the cavity are coupled to the leadframe. The first and second caps and the leadframe form an enclosure structure that substantially encloses the IC die, and shields EMI emanating from and radiating towards the IC die. The enclosure structure also dissipates heat generated by the IC die during operation.Type: ApplicationFiled: September 27, 2006Publication date: December 6, 2007Applicant: Broadcom CorporationInventors: Sam Ziqun Zhao, Rezaur Rahman Khan
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Publication number: 20070273049Abstract: Apparatuses, methods, and systems for improved integrated circuit packages are described. An integrated circuit (IC) package includes a substrate having opposing first and second surfaces, an IC die, a plurality of conductive elements, and an encapsulating material. The substrate has a plurality of contact pads on the first surface that are electrically coupled to a plurality of electrically conductive features on the second surface. The plurality of conductive elements is formed on the first surface of the substrate. The IC die is located on the first surface of the substrate. The encapsulating material encapsulates the IC die and a portion of each element of the plurality of conductive elements.Type: ApplicationFiled: January 11, 2007Publication date: November 29, 2007Applicant: Broadcom CorporationInventors: Rezaur Rahman Khan, Sam Ziqun Zhao
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Publication number: 20070273023Abstract: An apparatus and method for a wire-bond die-up area array package is described. The package includes an integrated circuit (IC) die, a substrate, and a thermally conducting body. A bottom surface of the IC die is exposed through an opening in a central region of the substrate. The die is mounted to the thermally conducting body. A bottom surface of the thermally conducting body is configured to be connected to a circuit board, such as a PWB, when the package is mounted to the circuit board. The bottom surface of the thermally conducting body may be connected directly to the circuit board, or may be coupled to the circuit board via solder balls or other mechanism. One or more wirebonds are used to electrically connect the die to a top surface of the substrate. A mold compound encapsulates the die, the wirebonds, and at least a portion of the top surface of the substrate, and fills a gap between peripheral edges of the IC die and inner walls of the substrate central window opening.Type: ApplicationFiled: October 20, 2006Publication date: November 29, 2007Applicant: Broadcom CorporationInventors: Sam Ziqun Zhao, Edward Law, Rezaur Rahman Khan
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Publication number: 20070267734Abstract: Methods and apparatus for improved thermal performance and electromagnetic interference (EMI) shielding in integrated circuit (IC) packages are described. A die-up or die-down package includes an IC die, a die attach pad, a heat spreader cap coupled to the die attach pad defining a cavity, and one or more peripheral rows of leads surrounding the die attach pad. The leads do not protrude substantially from the footprint of the encasing structure. The die attach pad and the heat spreader cap defines an encasing structure that substantially encloses the IC die, and shields EMI emanating from and radiating towards the IC die. The encasing structure also dissipates heat generated by the IC die during operation.Type: ApplicationFiled: July 5, 2006Publication date: November 22, 2007Applicant: Broadcom CorporationInventors: Sam Ziqun Zhao, Rezaur Rahman Khan
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Publication number: 20070267740Abstract: A method, system, and apparatus for improved IC device packaging is described. In an aspect, an (IC) device package includes an IC die having at one or more contact pads, each contact pad located at a corresponding hotspot on a surface of the IC die. The package also includes a thermally conductive interposer which is thermally coupled to the IC die at the contact pads. In another aspect, an underfill material fills a space between the IC die and the interposer. The interposer may also be electrically coupled to the IC die. In an aspect, the interposer and the IC die are coupled through thermal interconnects or “nodules.Type: ApplicationFiled: September 5, 2006Publication date: November 22, 2007Applicant: Broadcom CorporationInventors: Rezaur Rahman Khan, Sam Ziqun Zhao
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Patent number: 7271479Abstract: A flip chip package generally includes a substrate, a flip chip die, and a heat spreader. The flip chip die is coupled to the substrate. The heat spreader is coupled to the flip chip die. The heat spreader can include one or more walls. Generally, the one or more walls at least partially laterally surround the flip chip die and/or the substrate. The walls can completely laterally surround the flip chip die to define a cavity in the heat spreader. The flip chip package can further include an encapsulate. For example, the encapsulate can be injected between the one or more walls of the heat spreader and the flip chip die and/or other components of the flip chip package. The encapsulate and/or the one or more walls of the heat spreader can protect one or more components of the flip chip package against moisture, corrosives, heat, or radiation, to provide some examples.Type: GrantFiled: November 3, 2004Date of Patent: September 18, 2007Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Reza-ur Rahman Khan
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Patent number: 7245500Abstract: Electrically, thermally and mechanically enhanced ball grid array (BGA) packages are described. An IC die is mounted on a first surface of a stiffener. A first surface of a substrate is attached to a second surface of the stiffener that is opposed to the first surface of the stiffener. A bond pad of the IC die is coupled to a contact pad on the first surface of the substrate with a wire bond. The wire bond is coupled over a recessed step region in the first surface of the stiffener and through a through-pattern in the stiffener that has an edge adjacent to the recessed step region. The through-pattern in the stiffener is one of an opening through the stiffener, a recessed portion in an edge of the stiffener, or other through-pattern.Type: GrantFiled: October 31, 2002Date of Patent: July 17, 2007Assignee: Broadcom CorporationInventors: Reza-ur Rahman Khan, Sam Ziqun Zhao
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Patent number: 7241645Abstract: Electrically, thermally and mechanically enhanced ball grid array (BGA) packages are described. An IC die is mounted to a first surface of a first stiffener. A peripheral edge portion of a second surface of the first stiffener is attached to a first surface of a second stiffener to cover an opening through the second stiffener that is open at the first surface and a second surface of the second stiffener. The second surface of the second stiffener is attached to a first surface of a substantially planar substrate that has a plurality of contact pads on the first surface of the substrate. The plurality of contact pads are electrically connected through the substrate to a plurality of solder ball pads on a second surface of the substrate.Type: GrantFiled: September 2, 2004Date of Patent: July 10, 2007Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Reza-ur Rahman Khan
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Patent number: 7202559Abstract: Electrically, mechanically, and thermally enhanced ball grid array (BGA) packages are described. An IC die is mounted in a centrally located cavity of a substantially planar first surface of a stiffener. The first surface of a substrate is attached to a substantially planar second surface of the stiffener. The second surface of the stiffener is opposed to the first surface of the stiffener. A centrally located protruding portion on the second surface of the stiffener is opposed to the centrally located cavity. The protruding portion extends through an opening in the substrate. A wire bond is coupled from a bond pad of the IC die to a contact pad on the first surface of the substrate through a through-pattern in the stiffener. The through-pattern in the stiffener is one of an opening through the stiffener, a recessed portion in an edge of the stiffener, a notch in an edge of the recessed portion, and a notch in an edge of the opening.Type: GrantFiled: January 13, 2005Date of Patent: April 10, 2007Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Rezaur Rahman Khan
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Patent number: 7161239Abstract: Electrically, mechanically, and thermally enhanced ball grid array (BGA) packages are described. A substrate has a surface, wherein the surface has an opening therein. A stiffener has a surface coupled to the surface of the substrate. An area of the surface of the stiffener can be greater than, equal to, or less than an area of the surface of the substrate. A thermal connector is coupled to the surface of the stiffener through the opening. A surface of the thermal connector is capable of attachment to a printed circuit board (PCB) when the BGA package is mounted to the PCB. The thermal connector can have a height such that the thermal connector extends into a cavity formed in a surface of the PCB when the BGA package is mounted to the PCB. Alternatively, the stiffener and thermal connector may be combined into a single piece stiffener, wherein the stiffener has a protruding portion.Type: GrantFiled: October 31, 2002Date of Patent: January 9, 2007Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Reza-ur Rahman Khan
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Patent number: 7132744Abstract: An electrically and thermally enhanced die-up tape substrate ball grid array (BGA) package and die-up plastic substrate BGA package are described. A substrate that has a first surface and a second surface is provided. An IC die is mounted to the first substrate surface. A plurality of solder balls is attached to the second substrate surface. A thermal connector is mounted to the second substrate surface. The thermal connector is configured be coupled to a printed circuit board.Type: GrantFiled: October 29, 2001Date of Patent: November 7, 2006Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Reza-ur Rahman Khan
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Patent number: 7078806Abstract: A system and method of assembling a ball grid array (BGA) package with IC die support is described. A stiffener is attached to a substrate that includes a centrally located opening with an integrated circuit (IC) die support structure removably held therein. An IC die is mounted to a central region of the stiffener. Further assembly process steps may be performed on the BGA package with IC die support. The IC die support structure is removed from the centrally located opening. In aspects of the invention, the IC die support structure is removably held in the opening by an adhesive tape or by one or more substrate tabs.Type: GrantFiled: July 27, 2004Date of Patent: July 18, 2006Assignee: Broadcom CorporationInventors: Reza-ur Rahman Khan, Sam Ziqun Zhao
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Patent number: 7005737Abstract: An electrically and thermally enhanced die-up tape substrate ball grid array (BGA) package and die-up plastic substrate BGA package are described. A substrate that has a first surface and a second surface is provided. The stiffener has a first surface and a second surface. The second stiffener surface is attached to the first substrate surface. An IC die has a first surface and a second surface. The first IC die surface is mounted to the first stiffener surface. A plurality of solder balls is attached to the second substrate surface. In one aspect, a heat spreader is mounted to the second IC die surface. In another aspect, the stiffener is coupled to ground to act as a ground plane. In another aspect, the substrate has a window opening that exposes a portion of the second stiffener surface. The exposed portion of the second stiffener surface is configured to be coupled to a printed circuit board (PCB). In another aspect, a metal ring is attached to the first stiffener surface.Type: GrantFiled: July 25, 2002Date of Patent: February 28, 2006Assignee: Broadcom CorporationInventors: Sam Ziqun Zhao, Reza-ur Rahman Khan
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Patent number: 6989593Abstract: An electrically and thermally enhanced die-up tape substrate ball grid array (BGA) package and die-up plastic substrate BGA package are described. A substrate that has a first surface and a second surface is provided. The stiffener has a first surface and a second surface. The second stiffener surface is attached to the first substrate surface. An IC die has a first surface and a second surface. The first IC die surface is mounted to the first stiffener surface. A plurality of solder balls is attached to the second substrate surface. In one aspect, a heat spreader is mounted to the second IC die surface. In another aspect, the stiffener is coupled to ground to act as a ground plane. In another aspect, the substrate has a window opening that exposes a portion of the second stiffener surface. The exposed portion of the second stiffener surface is configured to be coupled to a printed circuit board (PCB). In another aspect, a metal ring is attached to the first stiffener surface.Type: GrantFiled: July 24, 2002Date of Patent: January 24, 2006Assignee: Broadcom CorporationInventors: Reza-ur Rahman Khan, Sam Ziqun Zhao, Brent Bacher