Patents by Inventor Samanatha J. Edirisooriya

Samanatha J. Edirisooriya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Mapping data blocks to storage blocks to wrap around storage devices
    Patent number: 7467281
    Abstract: Provided are a techniques for mapping data blocks to storage blocks. A portion of data is received, and the portion of data is segmented into one or more data blocks. The one or more data blocks are mapped to one or more storage blocks of one or more storage devices, wherein the one or more data blocks are mapped to wrap around the storage devices after each of the storage devices has been utilized.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: December 16, 2008
    Assignee: Intel Corporation
    Inventor: Samanatha J. Edirisooriya
  • Storage device parity computation
    Patent number: 7318190
    Abstract: Provided are a techniques for receiving a modification to at least one data block. Parity blocks that are to be computed for the at least one data block are determined. At least one common term for computations for the determined parity blocks is determined. A first parity block from the determined parity blocks is computed that generates intermediate parity results for the common term. A second parity block from the determined parity blocks is computed using the intermediate parity results.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: January 8, 2008
    Assignee: Intel Corporation
    Inventor: Samanatha J. Edirisooriya