Patents by Inventor Sambuddha Bhattacharya

Sambuddha Bhattacharya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230177414
    Abstract: The method can include optionally training a transportation modality classification model; determining a transportation modality of a trip; and optionally triggering an action based on the transportation modality. However, the method can additionally or alternatively include any other suitable elements. The method functions to facilitate a classification of a transportation modality for trips based on location data (e.g., collected at a mobile device). Additionally or alternatively, the method can function to facilitate content provisions based on a trip classification.
    Type: Application
    Filed: December 5, 2022
    Publication date: June 8, 2023
    Inventors: Sambuddha Bhattacharya, Amol Bambode, Laxman Jangley, Darshan Shirodkar, Rajesh Bhat, Abhishek
  • Publication number: 20230177121
    Abstract: The system can include a plurality of data processing modules (e.g., machine learning models, rule-based models, etc.), which can include: a feature generation module, a Driver versus Passenger (DvP) classification module, a validation module, an update module, and/or any other suitable data processing modules. The system can optionally include a mobile device (e.g., such as a mobile cellular telephone, user device, etc.) and/or can be used in conjunction with a mobile device (e.g., receive data from an application executing at the mobile device and/or utilize mobile device processing, etc.). However, the system can additionally or alternatively include any other suitable set of components. The system functions to facilitate execution of method S100. Additionally or alternatively, the system functions to classify a role of a mobile device user (e.g., driver or passenger; driver or nondriver; etc.) for a vehicle trip and/or determine a semantic label for the vehicle trip.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 8, 2023
    Inventors: Sambuddha Bhattacharya, Dr., Nikhil Mudaliar, Rajesh Bhat, Udit Gupta, Tapan Bhardwaj
  • Publication number: 20230134342
    Abstract: The system can include a plurality of data processing modules, which can include: a feature generation module, a scoring module, an optional decision module, an optional trip detection module, and/or any other suitable data processing modules. The system can optionally include a mobile device (e.g., such as a mobile cellular telephone, user device, etc.) and/or can be used in conjunction with a mobile device (e.g., receive data from an application executing at the mobile device and/or utilize mobile device processing, etc.). The system can function to classify a vehicular transportation modality (e.g., motorcycle transportation) for a vehicle trip.
    Type: Application
    Filed: October 3, 2022
    Publication date: May 4, 2023
    Inventors: Sakshi Chandra, Sambuddha Bhattacharya, Jayanta Kumar Pal
  • Patent number: 9904755
    Abstract: In a method for legalizing a multi-patterning integrated circuit layout including a plurality of islands, a set of multi-patterning constraints is generated on the basis of multi-patterning conflicts identified between the plurality of islands. Based on general design rule constraints and the multi-patterning constraints a combined set of layout constraints is generated. Feasibility of the set of layout constraints is checked, which then is provided to a Linear Program solver for generating an output circuit layout.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: February 27, 2018
    Assignee: Synopsys, Inc.
    Inventors: Sambuddha Bhattacharya, Subramanian Rajagopalan, Shabbir Husain Batterywala
  • Patent number: 9898567
    Abstract: A method (and system) of automatically legalizing a circuit layout with layout objects in a presence of a plurality of non-uniform grids is disclosed. The method comprises generating a set of layout constraints comprising design rule constraints and gridding requirements based on the plurality of non-uniform grids. In addition, the method comprises processing the set of layout constraints to a feasible form using Boolean variables by determining infeasibility of the set of layout constraints, identifying infeasible layout constraints from the set of layout constraints, and resolving the infeasibility by a constraint relaxation process. Additionally, the method comprises generating an output circuit layout, for display to a user, by solving the set of layout constraints in the feasible form with standard linear program solvers.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: February 20, 2018
    Assignee: Synopsys, Inc.
    Inventors: Nitin Dileep Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir Husain Batterywala
  • Publication number: 20150248514
    Abstract: A method (and system) of automatically legalizing a circuit layout with layout objects in a presence of a plurality of non-uniform grids is disclosed. The method comprises generating a set of layout constraints comprising design rule constraints and gridding requirements based on the plurality of non-uniform grids. In addition, the method comprises processing the set of layout constraints to a feasible form using Boolean variables by determining infeasibility of the set of layout constraints, identifying infeasible layout constraints from the set of layout constraints, and resolving the infeasibility by a constraint relaxation process. Additionally, the method comprises generating an output circuit layout, for display to a user, by solving the set of layout constraints in the feasible form with standard linear program solvers.
    Type: Application
    Filed: February 23, 2015
    Publication date: September 3, 2015
    Inventors: NITIN DILEEP SALODKAR, SUBRAMANIAN RAJAGOPALAN, SAMBUDDHA BHATTACHARYA, SHABBIR HUSAIN BATTERYWALA
  • Patent number: 9043741
    Abstract: A layout-legalizing system modifies a portion of a circuit layout that is selected by a user to generate a modified portion that satisfies a set of technology constraints and a set of design constraints. The system receives as input the set of technology constraints which a semiconductor manufacturing foundry requires the circuit layout to satisfy for manufacturability purposes. The system also receives a set of design constraints from the user which restricts how objects in the portion of the circuit layout can be modified to satisfy the set of technology constraints. The system can further receive a selection input from the user which identifies the portion of the circuit layout which is to be legalized. The system then modifies the identified portion of the circuit layout to obtain a modified portion which satisfies the set of design constraints and at least a subset of the set of technology constraints.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: May 26, 2015
    Assignee: SYNOPSYS, INC.
    Inventors: Shabbir H. Batterywala, Sambuddha Bhattacharya, Subramanian Rajagopalan, Hi-Keung Tony Ma
  • Publication number: 20150095865
    Abstract: In a method for legalizing a multi-patterning integrated circuit layout including a plurality of islands, a set of multi-patterning constraints is generated on the basis of multi-patterning conflicts identified between the plurality of islands. Based on general design rule constraints and the multi-patterning constraints a combined set of layout constraints is generated. Feasibility of the set of layout constraints is checked, which then is provided to a Linear Program solver for generating an output circuit layout.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 2, 2015
    Inventors: Sambuddha Bhattacharya, Subramanian Rajagopalan, Shabbir Husain Batterywala
  • Publication number: 20110107286
    Abstract: A layout-legalizing system modifies a portion of a circuit layout that is selected by a user to generate a modified portion that satisfies a set of technology constraints and a set of design constraints. The system receives as input the set of technology constraints which a semiconductor manufacturing foundry requires the circuit layout to satisfy for manufacturability purposes. The system also receives a set of design constraints from the user which restricts how objects in the portion of the circuit layout can be modified to satisfy the set of technology constraints. The system can further receive a selection input from the user which identifies the portion of the circuit layout which is to be legalized. The system then modifies the identified portion of the circuit layout to obtain a modified portion which satisfies the set of design constraints and at least a subset of the set of technology constraints.
    Type: Application
    Filed: October 30, 2009
    Publication date: May 5, 2011
    Applicant: SYNOPSYS, INC.
    Inventors: Shabbir H. Batterywala, Sambuddha Bhattacharya, Subramanian Rajagopalan, Hi-Keung Tony Ma