Patents by Inventor Sambuddhi Hettiaratchi

Sambuddhi Hettiaratchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Compression of processor instructions
    Patent number: 9047080
    Abstract: A custom processor is adapted for performing at least one predetermined application. The instruction sequence for the custom processor is compressed by performing at least one identification process on the instructions of the instruction sequence, in order to identify relationships between the contents of the bit positions in the instructions. A compressed instruction sequence then includes one compressed instruction corresponding to each instruction of the predetermined instruction sequence, with each compressed instruction comprising a reduced number of bits, based on the identified relationships between the contents of said bit positions in said instructions of said predetermined instruction sequence.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: June 2, 2015
    Assignee: Altera Corporation
    Inventor: Sambuddhi Hettiaratchi
  • Implementing signal processing cores as application specific processors
    Patent number: 8046511
    Abstract: Methods and apparatus are provided for efficiently implementing signal processing cores as application specific processors. A signal processing core, such as a Fast Fourier Transform (FFT) core or a Finite Impulse Response (FIR) core includes a data path and a control path. A control path is implemented using processor components to increase resource efficiency. Both the data path and the control path can be implemented using function units that are selected, parameterized, and interconnected. A variety of signal processing algorithms can be implemented on the same application specific processor.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: October 25, 2011
    Assignee: Altera Corporation
    Inventors: Robert Jackson, Sambuddhi Hettiaratchi
  • Compression of processor instructions
    Patent number: 7913065
    Abstract: A custom processor is adapted for performing at least one predetermined application. The instruction sequence for the custom processor is compressed by performing at least one identification process on the instructions of the instruction sequence, in order to identify relationships between the contents of the bit positions in the instructions. A compressed instruction sequence then includes one compressed instruction corresponding to each instruction of the predetermined instruction sequence, with each compressed instruction comprising a reduced number of bits, based on the identified relationships between the contents of said bit positions in said instructions of said predetermined instruction sequence.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: March 22, 2011
    Assignee: Altera Corporation
    Inventor: Sambuddhi Hettiaratchi
  • IMPLEMENTING SIGNAL PROCESSING CORES AS APPLICATION SPECIFIC PROCESSORS
    Publication number: 20100023729
    Abstract: Methods and apparatus are provided for efficiently implementing signal processing cores as application specific processors. A signal processing core, such as a Fast Fourier Transform (FFT) core or a Finite Impulse Response (FIR) core includes a data path and a control path. A control path is implemented using processor components to increase resource efficiency. Both the data path and the control path can be implemented using function units that are selected, parameterized, and interconnected. A variety of signal processing algorithms can be implemented on the same application specific processor.
    Type: Application
    Filed: October 1, 2009
    Publication date: January 28, 2010
    Applicant: Altera Corporation
    Inventors: Robert Jackson, Sambuddhi Hettiaratchi
  • Implementing signal processing cores as application specific processors
    Patent number: 7613858
    Abstract: Methods and apparatus are provided for efficiently implementing signal processing cores as application specific processors. A signal processing core, such as a Fast Fourier Transform (FFT) core or a Finite Impulse Response (FIR) core includes a data path and a control path. A control path is implemented using processor components to increase resource efficiency. Both the data path and the control path can be implemented using function units that are selected, parameterized, and interconnected. A variety of signal processing algorithms can be implemented on the same application specific processor.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: November 3, 2009
    Assignee: Altera Corporation
    Inventors: Robert Jackson, Sambuddhi Hettiaratchi