Patents by Inventor Sameer Baveja

Sameer Baveja has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11855597
    Abstract: This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (INN) and an amplifier output (VOUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (INN) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (INP) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: December 26, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Sameer Baveja, Hamed Sadati
  • Patent number: 11848652
    Abstract: This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (INN) and an amplifier output (VOUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (INN) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (INP) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: December 19, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Sameer Baveja, Hamed Sadati
  • Patent number: 11522528
    Abstract: This application relates to methods and apparatus for voltage control, and in particular to maintain safe voltages for components of audio driving circuits that are operable in a high voltage mode. An audio driving circuit (100) may include a power supply module (106) and may be operable such that, in use, a voltage magnitude at a source terminal of at least a first transistor (306, 309, 603, 605) of the audio driving circuit can exceed its gate-source voltage tolerance. A voltage generator (111 P) is configured to output a first intermediate voltage (VSAFEP) to an intermediate voltage path for use as a gate control voltage for at least the first transistor, to maintain its gate-source voltage below tolerance. An intermediate path voltage clamp (114P) is provided for selectively clamping the intermediate voltage path to a voltage level, so as to maintain the magnitude of the gate-source voltage of the first transistor below tolerance.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: December 6, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Gary Robertson, Hamed Sadati, Rupesh Khare, Sameer Baveja
  • Publication number: 20220271722
    Abstract: This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (INN) and an amplifier output (VOUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (INN) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (INP) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.
    Type: Application
    Filed: May 10, 2022
    Publication date: August 25, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Sameer BAVEJA, Hamed SADATI
  • Publication number: 20220271721
    Abstract: This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (INN) and an amplifier output (VOUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (INN) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (INP) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.
    Type: Application
    Filed: May 10, 2022
    Publication date: August 25, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Sameer BAVEJA, Hamed SADATI
  • Patent number: 11368134
    Abstract: This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (INN) and an amplifier output (VOUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (INN) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (INP) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: June 21, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Sameer Baveja, Hamed Sadati
  • Publication number: 20210104987
    Abstract: This application relates to circuitry for monitoring for instability of an amplifier. The amplifier (100) has a first signal path between an amplifier input (INN) and an amplifier output (VOUT) and a feedback path from the output to form a feedback loop with at least part of the first signal path. A comparator (212) has a first input configured to receive a first signal (INN) derived from a first amplifier node which is part of said feedback loop and a second input configured to receive a second signal (INP) derived from a second amplifier node which varies with the signal at the amplifier input but does not form part of said feedback loop. The comparator is configured to compare the first signal to the second signal and generate a comparison signal (COMP), wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability.
    Type: Application
    Filed: September 22, 2020
    Publication date: April 8, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Sameer BAVEJA, Hamed SADATI
  • Publication number: 20210075404
    Abstract: This application relates to methods and apparatus for voltage control, and in particular to maintain safe voltages for components of audio driving circuits that are operable in a high voltage mode. An audio driving circuit (100) may include a power supply module (106) and may be operable such that, in use, a voltage magnitude at a source terminal of at least a first transistor (306, 309, 603, 605) of the audio driving circuit can exceed its gate-source voltage tolerance. A voltage generator (111 P) is configured to output a first intermediate voltage (VSAFEP) to an intermediate voltage path for use as a gate control voltage for at least the first transistor, to maintain its gate-source voltage below tolerance. An intermediate path voltage clamp (114P) is provided for selectively clamping the intermediate voltage path to a voltage level, so as to maintain the magnitude of the gate-source voltage of the first transistor below tolerance.
    Type: Application
    Filed: November 2, 2020
    Publication date: March 11, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Gary ROBERTSON, Hamed SADATI, Rupesh KHARE, Sameer BAVEJA
  • Patent number: 10855258
    Abstract: This application relates to methods and apparatus for voltage control, and in particular to maintain safe voltages for components of audio driving circuits that are operable in a high voltage mode. An audio driving circuit (100) may include a power supply module (106) and may be operable such that, in use, a voltage magnitude at a source terminal of at least a first transistor (306, 309, 603, 605) of the audio driving circuit can exceed its gate-source voltage tolerance. A voltage generator (111P) is configured to output a first intermediate voltage (VSAFEP) to an intermediate voltage path for use as a gate control voltage for at least the first transistor, to maintain its gate-source voltage below tolerance. An intermediate path voltage clamp (114P) is provided for selectively clamping the intermediate voltage path to a voltage level, so as to maintain the magnitude of the gate-source voltage of the first transistor below tolerance.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: December 1, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Gary Robertson, Hamed Sadati, Rupesh Khare, Sameer Baveja