Patents by Inventor Sameer Jayanta-Joglekar

Sameer Jayanta-Joglekar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High-linearity transistors
    Patent number: 10439059
    Abstract: A transistor includes a first gate-controlled region having a first threshold voltage and a second gate-controlled region in parallel with the first gate-controlled region. The second gate-controlled region has a second threshold voltage different form the first threshold voltage.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: October 8, 2019
    Assignee: Massachusetts Institute of Technology
    Inventors: Tomas Apostol Palacios, Sameer Jayanta-Joglekar, Ujwal Radhakrishna
  • HIGH-LINEARITY TRANSISTORS
    Publication number: 20180197999
    Abstract: A transistor includes a first gate-controlled region having a first threshold voltage and a second gate-controlled region in parallel with the first gate-controlled region. The second gate-controlled region has a second threshold voltage different form the first threshold voltage.
    Type: Application
    Filed: December 20, 2017
    Publication date: July 12, 2018
    Applicant: Massachusetts Institute of Technology
    Inventors: Tomas Apostol Palacios, Sameer Jayanta-Joglekar, Ujwal Radhakrishna