Patents by Inventor Sameer Nanavati
Sameer Nanavati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8537931Abstract: A synchronization and detection method in a wireless device may include performing coarse detection and synchronization with respect to a received signal. The synchronization and detection method may also include performing fine detection and synchronization for acquisition of the received signal. Results of the coarse detection and synchronization may be used for the fine detection and synchronization. The synchronization and detection method may also include performing tracking mode processing when the acquisition of the received signal has been achieved.Type: GrantFiled: January 4, 2008Date of Patent: September 17, 2013Assignee: QUALCOMM IncorporatedInventors: Jong Hyeon Park, Bok Tae Sim, Tae Ryun Chang, Je Woo Kim, Ju Won Park, Chae Kwan Lee, Sameer Nanavati
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Patent number: 8194588Abstract: A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages divided into coding blocks in an orthogonal frequency-division multiplexing (OFDM)/orthogonal frequency-division multiple access (OFDMA) receiver are provided. According to such a coding-block-based HARQ combining scheme, the quality of each coding block may be compared to a threshold to determine whether the decoded bits or the HARQ combined signal should be saved for each coding block for subsequent HARQ iterations. In addition to reducing the required HARQ buffer size while preserving the combining gain, coding-block-based HARQ combining may also provide fast decoding and reduced power consumption when compared to conventional HARQ combining techniques.Type: GrantFiled: December 13, 2007Date of Patent: June 5, 2012Assignee: QUALCOMM IncorporatedInventors: Jong Hyeon Park, Bok Tae Sim, Je Woo Kim, Serguei A. Glazko, Sameer Nanavati, James Y. Hurt
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Patent number: 8161342Abstract: A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages at different stages in an OFDM/OFDMA receiver are provided. A combination of different types of HARQ combiners may be designed into the receiver and selected on a per-channel basis. Proper selection of a HARQ combining scheme may reduce the required HARQ buffer size and may provide an increased combining gain when compared to conventional HARQ combining techniques. Furthermore, the HARQ combiner type may be dynamically selected through forward and reverse shifting between the different types of HARQ combining schemes in an effort to decrease the bit error ratio (BER) without saturating the HARQ buffer.Type: GrantFiled: December 13, 2007Date of Patent: April 17, 2012Assignee: QUALCOMM IncorporatedInventors: Jong Hyeon Park, Bok Tae Sim, Je Woo Kim, Serguei A. Glazko, Sameer Nanavati, Ju Won Park
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Patent number: 8132069Abstract: A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages at different stages in an orthogonal frequency-division multiplexing (OFDM)/orthogonal frequency-division multiple access (OFDMA) receiver are provided. The type of HARQ combiner used for a particular channel may depend on a number of selection criteria including the modulation order of the transmission, the number of bits needed for the combined signals, and the headroom in the HARQ buffer. For some embodiments, a combination of different types of HARQ combiners may be designed into a receiver and selected on a per-channel basis. Proper selection of a HARQ combining scheme may reduce the required HARQ buffer size and may provide an increased combining gain when compared to conventional HARQ combining techniques.Type: GrantFiled: December 13, 2007Date of Patent: March 6, 2012Assignee: QUALCOMM IncorporatedInventors: Jong Hyeon Park, Je Woo Kim, Sameer Nanavati, James Y. Hurt
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Patent number: 8000411Abstract: A method and apparatus for decoding encoded data bits of a wireless communication transmission are provided. A set of a-priori bit values corresponding to known bit values of the encoded data bits may be generated. Decoding paths that correspond to decoded data bits that are inconsistent with the a-priori bit values may be removed from the possible decoding paths to consider, and decoding the encoded data bits by selecting a decoding path from remaining decoding paths of the possible decoding paths that were not removed. Multiple hypotheses, each corresponding to a different set of a-prior bit values may be evaluated, with the decoded data for a hypothesis selected based on the evaluation output for further processing.Type: GrantFiled: January 4, 2008Date of Patent: August 16, 2011Assignee: Qualcomm IncorporatedInventors: Jong Hyeon Park, Bok Tae Sim, Je Woo Kim, Serguei A. Glazko, Sameer Nanavati, Ju Won Park, Chun Woo Lee, Tae Ryun Chang
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Publication number: 20090175394Abstract: A synchronization and detection method in a wireless device may include performing coarse detection and synchronization with respect to a received signal. The synchronization and detection method may also include performing fine detection and synchronization for acquisition of the received signal. Results of the coarse detection and synchronization may be used for the fine detection and synchronization. The synchronization and detection method may also include performing tracking mode processing when the acquisition of the received signal has been achieved.Type: ApplicationFiled: January 4, 2008Publication date: July 9, 2009Applicant: QUALCOMM INCORPORATEDInventors: Jong Hyeon Park, Bok Tae Sim, Tae Ryun Chang, Je Woo Kim, Ju Won Park, Chae Kwan Lee, Sameer Nanavati
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Publication number: 20090175387Abstract: A method and apparatus for decoding encoded data bits of a wireless communication transmission are provided. A set of a-priori bit values corresponding to known bit values of the encoded data bits may be generated. Decoding paths that correspond to decoded data bits that are inconsistent with the a-priori bit values may be removed from the possible decoding paths to consider, and decoding the encoded data bits by selecting a decoding path from remaining decoding paths of the possible decoding paths that were not removed. Multiple hypotheses, each corresponding to a different set of a-prior bit values may be evaluated, with the decoded data for a hypothesis selected based on the evaluation output for further processing.Type: ApplicationFiled: January 4, 2008Publication date: July 9, 2009Applicant: QUALCOMM INCORPORATEDInventors: Jong Hyeon Park, Bok Tae Sim, Je Woo Kim, Serguei A. Glazko, Sameer Nanavati, Ju Won Park, Chun Woo Lee, Tae Ryun Chang
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Publication number: 20090154392Abstract: A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages divided into coding blocks in an orthogonal frequency-division multiplexing (OFDM)/orthogonal frequency-division multiple access (OFDMA) receiver are provided. According to such a coding-block-based HARQ combining scheme, the quality of each coding block may be compared to a threshold to determine whether the decoded bits or the HARQ combined signal should be saved for each coding block for subsequent HARQ iterations. In addition to reducing the required HARQ buffer size while preserving the combining gain, coding-block-based HARQ combining may also provide fast decoding and reduced power consumption when compared to conventional HARQ combining techniques.Type: ApplicationFiled: December 13, 2007Publication date: June 18, 2009Applicant: QUALCOMM INCORPORATEDInventors: Jong Hyeon Park, Bok Tae Sim, Je Woo Kim, Serguei A. Glazko, Sameer Nanavati, James Y. Hurt
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Publication number: 20090158110Abstract: A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages at different stages in an OFDM/OFDMA receiver are provided. A combination of different types of HARQ combiners may be designed into the receiver and selected on a per-channel basis. Proper selection of a HARQ combining scheme may reduce the required HARQ buffer size and may provide an increased combining gain when compared to conventional HARQ combining techniques. Furthermore, the HARQ combiner type may be dynamically selected through forward and reverse shifting between the different types of HARQ combining schemes in an effort to decrease the bit error ratio (BER) without saturating the HARQ buffer.Type: ApplicationFiled: December 13, 2007Publication date: June 18, 2009Applicant: QUALCOMM INCORPORATEDInventors: Jong Hyeon Park, Bok Tae Sim, Je Woo Kim, Serguei A. Glazko, Sameer Nanavati, Ju Won Park
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Publication number: 20090158109Abstract: A method and apparatus for combining retransmitted hybrid automatic repeat-request (HARQ) messages at different stages in an orthogonal frequency-division multiplexing (OFDM)/orthogonal frequency-division multiple access (OFDMA) receiver are provided. The type of HARQ combiner used for a particular channel may depend on a number of selection criteria including the modulation order of the transmission, the number of bits needed for the combined signals, and the headroom in the HARQ buffer. For some embodiments, a combination of different types of HARQ combiners may be designed into a receiver and selected on a per-channel basis. Proper selection of a HARQ combining scheme may reduce the required HARQ buffer size and may provide an increased combining gain when compared to conventional HARQ combining techniques.Type: ApplicationFiled: December 13, 2007Publication date: June 18, 2009Applicant: QUALCOMM INCORPORATEDInventors: Jong Hyeon Park, Je Woo Kim, Sameer Nanavati, James Y. Hurt
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Patent number: 7360031Abstract: Method and apparatus to enable I/O agents to perform atomic operations in shared, coherent memory spaces. The apparatus includes an arbitration unit, a host interface unit, and a memory interface unit. The arbitration unit provides an interface to one or more I/O agents that issue atomic transactions to access and/or modify data stored in a shared memory space accessed via the memory interface unit. The host interface unit interfaces to a front-side bus (FSB) to which one or more processors may be coupled. In response to an atomic transaction issued by an I/O agent, the transaction is forked into two interdependent processes. Under one process, an inbound write transaction is injected into the host interface unit, which then drives the FSB to cause the processor(s) to perform a cache snoop. At the same time, an inbound read transaction is injected into the memory interface unit, which retrieves a copy of the data from the shared memory space.Type: GrantFiled: June 29, 2005Date of Patent: April 15, 2008Assignee: Intel CorporationInventors: Sridhar Lakshmanamurthy, Mason B. Cabot, Sameer Nanavati, Mark Rosenbluth
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Publication number: 20070005908Abstract: Method and apparatus to enable I/O agents to perform atomic operations in shared, coherent memory spaces. The apparatus includes an arbitration unit, a host interface unit, and a memory interface unit. The arbitration unit provides an interface to one or more I/O agents that issue atomic transactions to access and/or modify data stored in a shared memory space accessed via the memory interface unit. The host interface unit interfaces to a front-side bus (FSB) to which one or more processors may be coupled. In response to an atomic transaction issued by an I/O agent, the transaction is forked into two interdependent processes. Under one process, an inbound write transaction is injected into the host interface unit, which then drives the FSB to cause the processor(s) to perform a cache snoop. At the same time, an inbound read transaction is injected into the memory interface unit, which retrieves a copy of the data from the shared memory space.Type: ApplicationFiled: June 29, 2005Publication date: January 4, 2007Inventors: Sridhar Lakshmanamurthy, Mason Cabot, Sameer Nanavati, Mark Rosenbluth
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Patent number: 6889267Abstract: An embodiment of the present invention includes first and second storage elements. The first storage element stores request information transmitted from a first processor operating at a first frequency. The first and second processors operate at different frequencies. The request information is organized according to a request format. The second storage element stores response information transmitted by a second processor operating at a second frequency different than the first frequency in response to the request information. The response information is organized according to a response format.Type: GrantFiled: November 26, 2002Date of Patent: May 3, 2005Assignee: Intel CorporationInventors: Nicholas Duresky, Sameer Nanavati, Sunil Chaudhari, Corey Gee
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Patent number: 6789056Abstract: A method, apparatus, and system for communicating between a digital signal processor (DSP) and a packet processor.Type: GrantFiled: December 31, 2002Date of Patent: September 7, 2004Assignee: Intel CorporationInventors: Bapi Vinnakota, Sameer Nanavati, Saurin Shah, Nicholas E. Duresky
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Publication number: 20040136397Abstract: A method, apparatus, and system for communicating between a digital signal processor (DSP) and a packet processor.Type: ApplicationFiled: December 31, 2002Publication date: July 15, 2004Inventors: Bapi Vinnakota, Sameer Nanavati, Saurin Shah, Nicholas E. Duresky
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Publication number: 20040103224Abstract: An embodiment of the present invention includes first and second storage elements. The first storage element stores request information transmitted from a first processor operating at a first frequency. The first and second processors operate at different frequencies. The request information is organized according to a request format. The second storage element stores response information transmitted by a second processor operating at a second frequency different than the first frequency in response to the request information. The response information is organized according to a response format.Type: ApplicationFiled: November 26, 2002Publication date: May 27, 2004Inventors: Nicholas Duresky, Sameer Nanavati, Sunil Chaudhari, Corey Gee