Abstract: A vector tree correlator correlates over received data spread at differing spreading rates or, over differing lengths of spreading sequence. When the maximum length sequence has a length N that is an integer power of 2, or 2M, then the vector tree correlator is formed from M levels. Level (1) is formed of add/subtract logic units, and Level (2) through Level (M) are formed of adders. Add/subtract logic units each receive a pair of received signal samples and combines the received signal samples based on a control signal input. The control signal input is derived from the locally generated spreading sequence. The output of the adder at the top of the tree is the result of the length N correlation, while output tap points at different levels of the tree each provide a correlation for one of the different spreading rates of length 2m, 1 <m <M.

Abstract: A counter sequence is mapped with an interleaving algorithm Both the sequence and mapped sequence of values are associated with values in a block of data values and a corresponding block of interleaved values. For a receiver, the mapped counter sequence is employed to generate a sequence of addresses corresponding to of the interleaved block in a buffer. The counter provides a sequence of address values associated with the original sequence of data values before interleaving. Memory addresses for storing the data values in the interleaved block to reconstruct the original block are assigned based on the counter sequence and the mapped counter sequence of values.

Abstract: A set of orthogonal sequences (e.g., Hadamard sequences) is decomposed into a set of basis vectors and sets of coefficients, where each set of coefficients represents a particular “vector combination” of the basis vectors that forms one of the orthogonal sequences. Such decomposition of orthogonal sequences into basis vectors and sets of coefficients may allow for a reduction in memory space and/or processing required to generate one or more of the orthogonal sequences during real-time operations of a communications system, such as an IS-95 CDMA system, that employs the orthogonal sequences. In one embodiment, a Hadamard sequence generator includes a controller, a memory, and a combiner. The set of basis vectors are stored in the memory, and each of the Hadamard sequences has a corresponding set of coefficients from which the Hadamard sequence can be derived as a vector combination of the basis vectors.

Abstract: A method and apparatus are disclosed for determining the data rate of a received signal in a communication system utilizing code division multiple access (CDMA) techniques. The well-known Viterbi decoding-based rate detection approach is combined with the conventional repetition pattern-based rate detection approach. The hybrid approach possesses the advantages of both prior approaches, without their disadvantages. The computationally efficient repetition pattern-based data rate detection approach, while not as reliable as the Viterbi decoder-based data rate detection approach, provides reliable data rate detection most of the time. The repetition-pattern data rate detection approach is used as long as a predefined reliability metric is satisfied, and only uses the more computationally intensive Viterbi decoder-based data rate detection approach when detection reliability may be compromised.

Abstract: A vector tree correlator correlates over received samples of data spread at differing spreading rates or, equivalently, over the received samples over differing lengths of spreading sequence. When the maximum length sequence has a length N that is an integer power of 2, or 2M, then the vector tree correlator is formed from M levels. Level (1) is formed of add/subtract logic units, and Level (2) through Level (M) are formed of adders. Add/subtract logic units each receive a pair of received signal samples and combines the received signal samples based on a control signal input. The control signal input is derived from the locally generated spreading sequence. Adders of each level combine corresponding pairs of output values from the previous level. The outputs of the lower level are paired sequentially, for example, from left to right to form “groups” that may be traced downward through the tree to the corresponding received samples input to the add/subtract logic units.