Patents by Inventor Samer Sallam

Samer Sallam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8589138
    Abstract: A system and method to analyze analog, mixed-signal, and custom digital circuits. The system and method displays to a user characteristic values of a circuit and statistical uncertainty values of the characteristic values early in a sampling or characterization run of the circuit. The characteristic values and their statistical uncertainties are updated as the sampling or characterization run progresses. The user can halt the sampling or characterization run once a desired level of uncertainty is attained. The system can automatically halt the sampling or characterization run, once the statistical uncertainty lie within a pre-determined range.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: November 19, 2013
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Charles Cazabon, Kristopher Breen, Amit Gupta, Jeffrey Dyck, Jiandong Ge, David Callele, Shawn Rusaw, Joel Cooper, Anthony Arkles, Samer Sallam, Jason Coutu
  • Patent number: 8281270
    Abstract: A method for proximity-aware circuit design where a set of layout constraint values that satisfy predetermined performance or yield goals is determined in accordance with a layout effect model. One of the layout constraint values is then selected as a constraint input to layout design, and a design layout is performed with the selected layout constraint value to provide a semiconductor circuit design for the semiconductor circuit. The set of layout constraint values can be determined by varying an instance parameter of the layout effect model to determine a set of instance parameters that satisfy the at least one predetermined performance or yield goal in accordance with the layout effect model, and determining layout constraints associated with each instance parameter of the set of instance parameters, thus providing a number of candidates in a design space that can be evaluated according to performance and/or yield tradeoffs.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: October 2, 2012
    Assignee: Solido Design Automation Inc.
    Inventors: Patrick G. Drennan, Ryan Silk, Joel Cooper, Jeffrey Dyck, Samer Sallam, Trent Lome McConaghy
  • Patent number: 8074189
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to begin with a complex problem description that encompasses many variables from statistical manufacturing, the circuit's environment, and the circuit's design parameters, but then apply techniques to prune the scope of the problem to make it manageable for manual design and more efficient automated design, and finally use that pruned problem for more efficient and effective design.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: December 6, 2011
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Jeffrey Dyck, Samer Sallam, Kristopher Breen, Joel Cooper, Jiandong Ge
  • Patent number: 8024682
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to do: global statistical optimization (GSO), global statistical characterization (GSC), global statistical design (GSD), and block-specific design. GSO can perform global yield optimization on hundreds of variables, with no simplifying assumptions. GSC can capture and display mappings from design variables to performance, across the whole design space. GSC can handle hundreds of design variables in a reasonable time frame, e.g., in less than a day, for a reasonable number of simulations, e.g., less than 100,000. GSC can capture design variable interactions and other possible nonlinearities, explicitly capture uncertainties, and intuitively display them. GSD can support the user's exploration of design-to-performance mappings with fast feedback, thoroughly capturing design variable interactions in the whole space, and allow for more efficiently created, more optimal designs.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: September 20, 2011
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Pat Drennan, Joel Cooper, Jeffrey Dyck, David Callele, Shawn Rusaw, Samer Sallam, Jiangdon Ge, Anthony Arkles, Kristopher Breen, Sean Cocks
  • Publication number: 20110055782
    Abstract: A method for proximity-aware circuit design where a set of layout constraint values that satisfy predetermined performance or yield goals is determined in accordance with a layout effect model. One of the layout constraint values is then selected as a constraint input to layout design, and a design layout is performed with the selected layout constraint value to provide a semiconductor circuit design for the semiconductor circuit. The set of layout constraint values can be determined by varying an instance parameter of the layout effect model to determine a set of instance parameters that satisfy the at least one predetermined performance or yield goal in accordance with the layout effect model, and determining layout constraints associated with each instance parameter of the set of instance parameters, thus providing a number of candidates in a design space that can be evaluated according to performance and/or yield tradeoffs.
    Type: Application
    Filed: August 27, 2010
    Publication date: March 3, 2011
    Applicant: Solido Design Automation Inc.
    Inventors: Patrick G. DRENNAN, Ryan Silk, Joel Cooper, Jeffrey Dyck, Samer Sallam, Trent Lorne McCONAGHY
  • Publication number: 20090228846
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to do: global statistical optimization (GSO), global statistical characterization (GSC), global statistical design (GSD), and block-specific design. GSO can perform global yield optimization on hundreds of variables, with no simplifying assumptions. GSC can capture and display mappings from design variables to performance, across the whole design space. GSC can handle hundreds of design variables in a reasonable time frame, e.g., in less than a day, for a reasonable number of simulations, e.g., less than 100,000. GSC can capture design variable interactions and other possible nonlinearities, explicitly capture uncertainties, and intuitively display them. GSD can support the user's exploration of design-to-performance mappings with fast feedback, thoroughly capturing design variable interactions in the whole space, and allow for more efficiently created, more optimal designs.
    Type: Application
    Filed: March 3, 2009
    Publication date: September 10, 2009
    Applicant: SOLIDO DESIGN AUTOMATION INC.
    Inventors: Trent Lorne McCONAGHY, Pat DRENNAN, Joel COOPER, Jeffrey DYCK, David CALLELE, Shawn RUSAW, Samer SALLAM, Jiangdon GE, Anthony ARKLES, Kristopher BREEN, Sean COCKS
  • Publication number: 20090216359
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to begin with a complex problem description that encompasses many variables from statistical manufacturing, the circuit's environment, and the circuit's design parameters, but then apply techniques to prune the scope of the problem to make it manageable for manual design and more efficient automated design, and finally use that pruned problem for more efficient and effective design.
    Type: Application
    Filed: February 5, 2009
    Publication date: August 27, 2009
    Applicant: Solido Design Automation Inc.
    Inventors: Trent Lorne MCCONAGHY, Jeffrey DYCK, Samer SALLAM, Kristopher BREEN, Joel COOPER, Jiandong GE
  • Publication number: 20080300847
    Abstract: A system and method to analyze analog, mixed-signal, and custom digital circuits. The system and method displays to a user characteristic values of a circuit and statistical uncertainty values of the characteristic values early in a sampling or characterization run of the circuit. The characteristic values and their statistical uncertainties are updated as the sampling or characterization run progresses. The user can halt the sampling or characterization run once a desired level of uncertainty is attained. The system can automatically halt the sampling or characterization run, once the statistical uncertainty lie within a pre-determined range.
    Type: Application
    Filed: June 2, 2008
    Publication date: December 4, 2008
    Applicant: SOLIDO DESIGN AUTOMATION INC.
    Inventors: Trent Lorne MCCONAGHY, Charles CAZABON, Kristopher BREEN, Amit GUPTA, Jeff DYCK, Jiandong GE, David CALLELE, Shawn RUSAW, Joel COOPER, Anthony ARKLES, Samer SALLAM, Jason COUTU