Patents by Inventor Samitha Samaranayake
Samitha Samaranayake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260104261Abstract: Existing dynamic vehicle routing systems for microtransit services either provide prompt confirmation (without continually optimizing vehicle routes, which reduces system efficiency) or continually optimize vehicle routes (without providing immediate service guarantees, which hinders user satisfaction and adoption). The disclosed system overcomes that tradeoff by integrating a prompt confirmation module (that provides near-instantaneous acceptance or rejection) with an anytime optimization module (that continuously improves vehicle manifests during the idle periods between request arrivals).Type: ApplicationFiled: October 8, 2025Publication date: April 16, 2026Inventors: Amutheezan Sivagnanam, Ayan Mukhopadhyay, Samitha Samaranayake, Abhishek Dubey, Aron Laszka
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Patent number: 11614751Abstract: Described are concepts, systems, devices and techniques for real-time high-capacity ride-sharing that (i) scales to large numbers of passengers and trips and (ii) dynamically generates routes (e.g. optimal or near optimal routes) in response to online demand and vehicle locations.Type: GrantFiled: January 23, 2018Date of Patent: March 28, 2023Assignee: Massachusetts Institute of TechnologyInventors: Javier Alonso-Mora, Samitha Samaranayake, Alexander J. Wallar, Daniela L. Rus
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Publication number: 20180231984Abstract: Described are concepts, systems, devices and techniques for real-time high-capacity ride-sharing that (i) scales to large numbers of passengers and trips and (ii) dynamically generates routes (e.g. optimal or near optimal routes) in response to online demand and vehicle locations.Type: ApplicationFiled: January 23, 2018Publication date: August 16, 2018Inventors: Javier Alonso-Mora, Samitha Samaranayake, Alexander J. Wallar, Daniela L. Rus
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Patent number: 7900105Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: May 12, 2010Date of Patent: March 1, 2011Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7836367Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: August 11, 2009Date of Patent: November 16, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7836368Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: August 24, 2009Date of Patent: November 16, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20100223516Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: May 12, 2010Publication date: September 2, 2010Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7774663Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: July 9, 2009Date of Patent: August 10, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7743299Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: July 23, 2008Date of Patent: June 22, 2010Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20100031101Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: August 11, 2009Publication date: February 4, 2010Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20090313514Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: August 24, 2009Publication date: December 17, 2009Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20090271673Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: July 9, 2009Publication date: October 29, 2009Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7596733Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: July 23, 2008Date of Patent: September 29, 2009Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic J. Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20080301510Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: July 23, 2008Publication date: December 4, 2008Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20080294955Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: July 23, 2008Publication date: November 27, 2008Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Patent number: 7418640Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: GrantFiled: May 28, 2004Date of Patent: August 26, 2008Assignee: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas W. Williams
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Publication number: 20050268190Abstract: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume and test application time.Type: ApplicationFiled: May 28, 2004Publication date: December 1, 2005Applicant: Synopsys, Inc.Inventors: Rohit Kapur, Nodari Sitchinava, Samitha Samaranayake, Emil Gizdarski, Frederic Neuveux, Suryanarayana Duggirala, Thomas Williams