Abstract: Magnetic field distribution and mutual capacitance control for transmission lines are provided. A first circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, and attaching a first trace to the second surface of the dielectric material. A surface profile of the reference plane layer is modified to decrease a resistance of a return current signal path through the reference plane layer, to reduce a magnetic field coupling between the first trace and a second trace. A second circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, attaching a trace to the dielectric material, and forming a solder mask layer on the dielectric material layer over the trace. An effective dielectric constant of the solder mask layer is modified to reduce or increase a mutual capacitance between the first trace and a second trace on the dielectric material.

Abstract: A twisted differential conductor pair is formed on a circuit board that includes first-third conductors. The second conductor includes first-third portions. The second portion of the second conductor extends between an end of the first conductor and an end of the third conductor, and couples an end of the first portion of the second conductor to an end of the third portion of the second conductor. A solder mask layer is formed over the first, second, and third conductors on the circuit board. An end of the first conductor and the end of the third conductor are exposed through the solder mask layer. The exposed end of the first conductor is coupled to the exposed end of the third conductor over the solder mask layer with a bridge. This configuration may be repeated to create multiple twists along the twisted differential conductor pair.

Abstract: Methods and apparatuses are described for integration of integrated circuit die and silicon-based trench capacitors using silicon-level connections to reduce connection lengths, parasitics and necessary capacitance magnitudes and volumes. A trench capacitor can be fabricated on silicon and mounted on or embedded in a chip or one or more sides of a through silicon interposer (TSI) for silicon-level connections to chip circuitry. Aspect ratio dependent, as opposed to trench diameter or trench depth dependent, trench capacitors formed by a dense array of high aspect ratio trenches with thin, high permittivity dielectric increase capacitance per unit area and volume, resulting in thin, high capacitance trench capacitors having thickness equal to or less than chip thickness.

Abstract: Methods, systems, and apparatuses for circuit boards are provided herein. An electrically insulating material is formed over one or more traces on a circuit board. One or more further electrically conductive features are present on the circuit board. A layer of an electrically conductive material is formed over the one or more traces that is electrically isolated from the one or more traces by the electrically insulating material, and is in electrical contact with the one or more further electrically conductive features. The electrically conductive material confines magnetic and electric fields produced when the one or more traces conduct an alternating current. By confining the magnetic and electric field distributions in this manner, problems of interference and/or crosstalk with adjacent signal traces are reduced or eliminated.

Abstract: Methods and apparatuses are described for integration of integrated circuit die and silicon-based trench capacitors using silicon-level connections to reduce connection lengths, parasitics and necessary capacitance magnitudes and volumes. A trench capacitor can be fabricated on silicon and mounted on or embedded in a chip or one or more sides of a through silicon interposer (TSI) for silicon-level connections to chip circuitry. Aspect ratio dependent, as opposed to trench diameter or trench depth dependent, trench capacitors formed by a dense array of high aspect ratio trenches with thin, high permittivity dielectric increase capacitance per unit area and volume, resulting in thin, high capacitance trench capacitors having thickness equal to or less than chip thickness.

Abstract: Methods, systems, and apparatuses for circuit boards are provided herein. An electrically insulating material is formed over one or more traces on a circuit board. One or more further electrically conductive features are present on the circuit board. A layer of an electrically conductive material is formed over the one or more traces that is electrically isolated from the one or more traces by the electrically insulating material, and is in electrical contact with the one or more further electrically conductive features. The electrically conductive material confines magnetic and electric fields produced when the one or more traces conduct an alternating current. By confining the magnetic and electric field distributions in this manner, problems of interference and/or crosstalk with adjacent signal traces are reduced or eliminated.

Abstract: Magnetic field distribution and mutual capacitance control for transmission lines are provided. A first circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, and attaching a first trace to the second surface of the dielectric material. A surface profile of the reference plane layer is modified to decrease a resistance of a return current signal path through the reference plane layer, to reduce a magnetic field coupling between the first trace and a second trace. A second circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, attaching a trace to the dielectric material, and forming a solder mask layer on the dielectric material layer over the trace. An effective dielectric constant of the solder mask layer is modified to reduce or increase a mutual capacitance between the first trace and a second trace on the dielectric material.

Abstract: Magnetic field distribution and mutual capacitance control for transmission lines are provided. A first circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, and attaching a first trace to the second surface of the dielectric material. A surface profile of the reference plane layer is modified to decrease a resistance of a return current signal path through the reference plane layer, to reduce a magnetic field coupling between the first trace and a second trace. A second circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, attaching a trace to the dielectric material, and forming a solder mask layer on the dielectric material layer over the trace. An effective dielectric constant of the solder mask layer is modified to reduce or increase a mutual capacitance between the first trace and a second trace on the dielectric material.

Abstract: A twisted differential conductor pair is formed on a circuit board that includes first-third conductors. The second conductor includes first-third portions. The second portion of the second conductor extends between an end of the first conductor and an end of the third conductor, and couples an end of the first portion of the second conductor to an end of the third portion of the second conductor. A solder mask layer is formed over the first, second, and third conductors on the circuit board. An end of the first conductor and the end of the third conductor are exposed through the solder mask layer. The exposed end of the first conductor is coupled to the exposed end of the third conductor over the solder mask layer with a bridge. This configuration may be repeated to create multiple twists along the twisted differential conductor pair.

Abstract: Methods, systems, and apparatuses for circuit boards are provided herein. An electrically insulating material is formed over one or more traces on a circuit board. One or more further electrically conductive features are present on the circuit board. A layer of an electrically conductive material is formed over the one or more traces that is electrically isolated from the one or more traces by the electrically insulating material, and is in electrical contact with the one or more further electrically conductive features. The electrically conductive material confines magnetic and electric fields produced when the one or more traces conduct an alternating current. By confining the magnetic and electric field distributions in this manner, problems of interference and/or crosstalk with adjacent signal traces are reduced or eliminated.

Abstract: Magnetic field distribution and mutual capacitance control for transmission lines are provided. A first circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, and attaching a first trace to the second surface of the dielectric material. A surface profile of the reference plane layer is modified to decrease a resistance of a return current signal path through the reference plane layer, to reduce a magnetic field coupling between the first trace and a second trace. A second circuit board is fabricated by attaching a reference plane layer to a dielectric material layer, attaching a trace to the dielectric material, and forming a solder mask layer on the dielectric material layer over the trace. An effective dielectric constant of the solder mask layer is modified to reduce or increase a mutual capacitance between the first trace and a second trace on the dielectric material.