Abstract: Testing power domains of a circuit design includes correlating, using a processor, a selected power domain of a circuit design having a plurality of power domains with a partial reconfiguration partition and implementing the circuit design within an integrated circuit. The partial reconfiguration partition is implemented within a reconfigurable region of the integrated circuit. A power off state for the selected power domain of the circuit design is emulated by partially reconfiguring the reconfigurable region of the integrated circuit.

Abstract: A method is provided for testing a circuit design in a programmable IC. The circuit design and a sampling circuit are implemented in the programmable IC. A first routing circuit is implemented in the programmable IC to route signals from the designated locations of a first subset of a set of test nodes of the circuit design to a set of input nodes of the sampling circuit. Signals are sampled from the first subset of test nodes using the sampling circuit. The programmable IC is partially reconfigured to implement a second routing circuit that replaces the first routing circuit. The second routing circuit is configured to route signals from a second subset of the set of test nodes to the set of input nodes of the sampling circuit. Signals from the second subset of test nodes are sampled using the sampling circuit.