Patents by Inventor Samson Berhane
Samson Berhane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8333459Abstract: A printing device (10) including a substrate (22) having an aperture (20) extending therethrough, wherein the aperture includes a side wall and defines a liquid ink flow path, an ink firing chamber (24) fluidically connected to the aperture, and a coating positioned on the side wall of the aperture, the coating being impervious to etching by liquid ink, and wherein the coating is chosen from one of silicon dioxide, aluminum oxide, hafnium oxide and silicon nitride.Type: GrantFiled: April 29, 2008Date of Patent: December 18, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Rio Rivas, Jon A. Crabtree, Eric L. Nikkel, Siddhartha Bhowmik, Bradley D. Chung, Samson Berhane
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Publication number: 20110018938Abstract: A printing device (10) including a substrate (22) having an aperture (20) extending therethrough, wherein the aperture includes a side wall and defines a liquid ink flow path, an ink firing chamber (24) fluidically connected to the aperture, and a coating positioned on the side wall of the aperture, the coating being impervious to etching by liquid ink, and wherein the coating is chosen from one of silicon dioxide, aluminum oxide, hafnium oxide and silicon nitride.Type: ApplicationFiled: April 29, 2008Publication date: January 27, 2011Inventors: Rio Rivas, Jon A. Crabtree, Eric L. Nikkel, Siddhartha Bhowmik, Bradley D. Chung, Samson Berhane
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Patent number: 7517060Abstract: A cavitation structure for a print head has a first dielectric layer overlying at least a first portion of a substrate. A second dielectric layer has a first portion overlying at least a second portion of the substrate and a second portion, different from the first portion of the second dielectric layer, overlying at least a portion of the first dielectric layer. A cavitation layer has a first portion in contact with the first dielectric layer and a second portion in lateral contact with the second portion of the second dielectric layer. A third dielectric layer is disposed on only the first portion of the second dielectric layer.Type: GrantFiled: February 2, 2006Date of Patent: April 14, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ulrich E. Hess, Samson Berhane, Arjang Fartash
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Patent number: 7432582Abstract: A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.Type: GrantFiled: December 14, 2004Date of Patent: October 7, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Diane Lai, Samson Berhane, Barry C. Snyder, Ronald A. Hellekson, Hubert Vander Plas
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Publication number: 20060125882Abstract: Atomic layer deposition forms a cavitation layer of a print head.Type: ApplicationFiled: February 2, 2006Publication date: June 15, 2006Inventors: Ulrich Hess, Samson Berhane, Arjang Fartash
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Patent number: 7025894Abstract: Atomic layer deposition forms a cavitation layer of a print head.Type: GrantFiled: July 16, 2003Date of Patent: April 11, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ulrich E. Hess, Samson Berhane, Arjang Fartash
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Patent number: 6902872Abstract: A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.Type: GrantFiled: July 29, 2002Date of Patent: June 7, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Diane Lai, Samson Berhane, Barry C. Snyder, Ronald A. Hellekson, Hubert Vander Plas
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Publication number: 20050101040Abstract: A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.Type: ApplicationFiled: December 14, 2004Publication date: May 12, 2005Inventors: Daine Lai, Samson Berhane, Barry Snyder, Ronald Hellekson, Hubert Plas
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Publication number: 20050006339Abstract: Methods and systems for depositing metal patterns on a substrate are provided. Accordingly, an electroless active layer can be formed on a substrate. Ink-jet techniques can then be used to independently ink-jet at least two components of an electroless deposition composition onto a variety of substrates. A metal composition can be ink-jetted onto the electroless active layer. The metal composition can contain a metal salt and optional additives. A reducing agent composition can be ink-jetted either subsequent to or prior to ink-jetting of the metal composition to form an electroless composition on the substrate. The metal salt and reducing agent react to form a metal pattern which can be used in formation of electronic devices or other products. The described ink-jettable compositions are stable over a wide range of conditions and allow for wide latitude in inkjet formulations and choice of substrates.Type: ApplicationFiled: July 11, 2003Publication date: January 13, 2005Inventors: Peter Mardilovich, Gregory Heman, David Punsalan, Samson Berhane
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Publication number: 20040070649Abstract: Atomic layer deposition forms a cavitation layer of a print head.Type: ApplicationFiled: July 16, 2003Publication date: April 15, 2004Inventors: Ulrich E. Hess, Samson Berhane, Arjang Fartash
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Patent number: 6716737Abstract: A method of forming a through-substrate interconnect for a circuit element in a microelectronics device is provided. The device is formed on a substrate having a frontside and a backside, and includes a circuit element formed on the frontside of the substrate connected to a contact pad formed on the backside of the substrate by the through-substrate interconnect. The method includes forming a first interconnect structure extending into the substrate from the frontside of the substrate, at least partially forming the circuit element such that the circuit element is in electrical communication with the first interconnect structure, and forming a second interconnect structure extending into the substrate from the backside of the substrate after forming the first interconnect structure such that the second interconnect structure is in electrical communication with the first interconnect structure.Type: GrantFiled: July 29, 2002Date of Patent: April 6, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventors: Hubert Vander Plas, Barry C. Snyder, Ronald A. Hellekson, Ronnie J. Yenchik, Diane Lai, Samson Berhane
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Publication number: 20040017419Abstract: A method of manufacturing a microelectronics device is provided, wherein the microelectronics device is formed on a substrate having a frontside and a backside. The method comprises forming a circuit element on the frontside of the substrate from a plurality of layers deposited on the frontside of the substrate, wherein the plurality of layers includes an intermediate electrical contact layer, and forming an interconnect structure after forming the electrical contact layer. The interconnect structure includes a contact pad formed on the backside of the substrate, and a through-substrate interconnect in electrical communication with the contact pad, wherein the through-substrate interconnect extends from the backside of the substrate to the electrical contact layer.Type: ApplicationFiled: July 29, 2002Publication date: January 29, 2004Inventors: Diane Lai, Samson Berhane, Barry C. Snyder, Ronald A. Hellekson, Hubert Vander Plas
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Publication number: 20040018712Abstract: A method of forming a through-substrate interconnect for a circuit element in a microelectronics device is provided. The device is formed on a substrate having a frontside and a backside, and includes a circuit element formed on the frontside of the substrate connected to a contact pad formed on the backside of the substrate by the through-substrate interconnect. The method includes forming a first interconnect structure extending into the substrate from the frontside of the substrate, at least partially forming the circuit element such that the circuit element is in electrical communication with the first interconnect structure, and forming a second interconnect structure extending into the substrate from the backside of the substrate after forming the first interconnect structure such that the second interconnect structure is in electrical communication with the first interconnect structure.Type: ApplicationFiled: July 29, 2002Publication date: January 29, 2004Inventors: Hubert Vander Plas, Barry C. Snyder, Ronald A. Hellekson, Ronnie J. Yenchik, Diane Lai, Samson Berhane