Patents by Inventor Samson Wong

Samson Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11410222
    Abstract: Conventional user interfaces for large commercial ecosystems typically require a seller partner to scroll around and switch views many times to find the right operational service or data. A simplified user interface that includes limited information about those operational services enables the seller partner to more quickly and efficiently learn about, configure, and use those operational services which are available to them. The limited information may include eligibility information, seller partner-specific information associated with the operational service, and information about the operational service, allowing rapid navigation and decision making. Once enrolled in an operational service, the simplified user interface facilitates administration of the operational service.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: August 9, 2022
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Natalia Mozol-Ciocirlan, Satyaramakrishna Kuladeep Achanta, Hamdan Kabir, Victoria Khemani, Saurangshu Pandey, Mehdi Sheikholeslami, Samson Wong
  • Patent number: 6094711
    Abstract: The pin count of a processor is substantially reduced while effectively maintaining processor performance by using a staging register to receive and store a first data segment from a bus. A second data segment is received from the bus in a subsequent bus cycle and loaded into a cache. A steering circuit dynamically selects the transfer of the first or the second segment to a processor core, and orders positioning of the first and second data segments into the cache. In some embodiments, the cache is a first level cache and a second level cache is inserted between the bus and the processor. In these embodiments, the processor includes a bypassing circuit for designating the ordering of bus data in response to a memory access that misses the first level cache and hits the second level cache.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: July 25, 2000
    Assignee: Sun Microsystems, Inc.
    Inventor: Samson Wong
  • Patent number: D921110
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: June 1, 2021
    Assignee: WobbleWorks, Inc.
    Inventors: Samson Wong, Maxwell Bogue