Abstract: Baseband processor and communication overloading can be relieved in a portable wireless communication terminal by decentralizing power control (38, 39) and frequency shift control (75) functions that are conventionally concentrated in the baseband processor. A timing sequencer (31) for power control can be integrated into a transceiver of the portable wireless communications terminal, thereby advantageously permitting power control signals to be generated on the transceiver side (27, 29) rather than the baseband processor side. Shadow registers (74) containing information indicative of commonly used or repeated frequencies can be integrated into the transceiver side, thereby advantageously relieving the baseband processor of corresponding frequency shift control responsibilities.

Abstract: An RF receiver apparatus (31) is provided physically separately from a cooperating baseband processor apparatus (32). The RF receiver includes a mixer circuit (33) and an analog IF-to-digital baseband converter (34) formed on an integrated circuit. Sampling frequencies of the analog IF-to-digital baseband converter are controlled by the RF receiver apparatus.

Abstract: Baseband processor and communication overloading can be relieved in a portable wireless communication terminal by decentralizing power control (38, 39) and frequency shift control (75) functions that are conventionally concentrated in the baseband processor. A timing sequencer (31) for power control can be integrated into a transceiver of the portable wireless communications terminal, thereby advantageously permitting power control signals to be generated on the transceiver side (27, 29) rather than the baseband processor side. Shadow registers (74) containing information indicative of commonly used or repeated frequencies can be integrated into the transceiver side, thereby advantageously relieving the baseband processor of corresponding frequency shift control responsibilities.

Abstract: A semiconductor device has passive components integrated with the circuit and encapsulated in a plastic package for solder ball or leaded attachment. A plastic chip-scale semiconductor device has a substrate made of a plurality of patterned insulating layers alternating with patterned electrically conductive layers, the layers mutually adhering to form the substrate. The layers include a plurality of passive electrical components, such as capacitors, inductors, and resistors, and routing lines. Most routing lines terminate in a first plurality of bondable contact pads and a second plurality of solderable contact pads. The components and lines form a web and are configured mostly in a narrow peripheral band at least partially around a central substrate area, and are operable with high performance in conjunction with an integrated circuit (IC) chip.

Abstract: A semiconductor device has passive components integrated with the circuit and encapsulated in a plastic package for solder ball or leaded attachment. A plastic chip-scale semiconductor device has a substrate made of a plurality of patterned insulating layers alternating with patterned electrically conductive layers, the layers mutually adhering to form the substrate. The layers comprise a plurality of passive electrical components, such as capacitors, inductors, and resistors, and routing lines. Most routing line terminates in a first plurality of bondable contact pads and a second plurality of solderable contact pads. The components and lines form a web and are configured mostly in a narrow peripheral band at least partially around a central substrate area, and are operable with high performance in conjunction with an integrated circuit (IC) chip.

Abstract: A semiconductor device has passive components integrated with the circuit and encapsulated in a plastic package for solder ball or leaded attachment. A plastic chip-scale semiconductor device has a substrate made of a plurality of patterned insulating layers alternating with patterned electrically conductive layers, the layers mutually adhering to form the substrate. The layers include a plurality of passive electrical components, such as capacitors, inductors, and resistors, and routing lines. Most routing lines terminate in a first plurality of bondable contact pads and a second plurality of solderable contact pads. The components and lines form a web and are configured mostly in a narrow peripheral band at least partially around a central substrate area, and are operable with high performance in conjunction with an integrated circuit (IC) chip.

Abstract: A semiconductor device has passive components integrated with the circuit and encapsulated in a plastic package for solder ball or leaded attachment. A plastic chip-scale semiconductor device has a substrate made of a plurality of patterned insulating layers alternating with patterned electrically conductive layers, the layers mutually adhering to form the substrate. The layers comprise a plurality of passive electrical components, such as capacitors, inductors, and resistors, and routing lines. Most routing line terminates in a first plurality of bondable contact pads and a second plurality of solderable contact pads. The components and lines form a web and are configured mostly in a narrow peripheral band at least partially around a central substrate area, and are operable with high performance in conjunction with an integrated circuit (IC) chip.

Abstract: In an RF receiver apparatus (31) that is provided physically separately from a cooperating baseband processor apparatus (32), the frequency plan options of the RF receiver apparatus can be enhanced by integrating into the RF receiver apparatus a suitably designed digital-IF-to baseband converter.

Abstract: Baseband processor and communication overloading can be relieved in a portable wireless communication terminal by decentralizing power control (38, 39) and frequency shift control (75) functions that are conventionally concentrated in the baseband processor. A timing sequencer (31) for power control can be integrated into a transceiver of the portable wireless communications terminal, thereby advantageously permitting power control signals to be generated on the transceiver side (27, 29) rather than the baseband processor side. Shadow registers (74) containing information indicative of commonly used or repeated frequencies can be integrated into the transceiver side, thereby advantageously relieving the baseband processor of corresponding frequency shift control responsibilities.

Abstract: A quasi-interdigitated transistor (50) for rf power applications has a plurality of channel regions (102-118) that are each offset from each other in a y-direction such that a q.sub.x heating component from adjacent channel regions will affect any one channel region to a lesser extent that the q.sub.x from adjacent channel regions in the conventional interdigitated structure. In a preferred embodiment, the channel regions (102-118) are formed in a single, curved, V-shaped row such that the cumulative transverse width of all of the transistor sections is less than the waveguide cutoff frequency. The V-shaped row of transistor sections also provides the advantage of parallel signal paths having approximately the same propagation time delay such that there is no phase cancellation within the device.

Abstract: A quasi-interdigitated transistor (50) for rf power applications has a plurality of channel regions (102-118) that are each offset from each other in a y-direction such that a q.sub.x heating component from adjacent channel regions will affect any one channel region to a lesser extent that the q.sub.x from adjacent channel regions in the conventional interdigitated structure. In a preferred embodiment, the channel regions (102-118) are formed in a single, curved, V-shaped row such that the cumulative transverse width of all of the transistor sections is less than the waveguide cutoff frequency. The V-shaped row of transistor sections also provides the advantage of parallel signal paths having approximately the same propagation time delay such that there is no phase cancellation within the device.

Abstract: A parallel branched N-state design method is used for discrete increment signal processing systems, such as incremental phase shifters and attenuators. These systems are implemented using parallel branched signal processing networks, each with N parallel discrete increment branch circuits (i.e., without being restricted to binary-state networks). In comparison with conventional cascaded binary-state networks, the parallel branched N-state design achieves reduced complexity and insertion loss. An exemplary embodiment of a phase shift system providing 32 phase increments (or states) uses three cascaded phase shift networks--two quaternary-state networks (Quits 10, 20) and a single binary-state network (Bit 30). The most significant Quit (10) illustrates the N-state design, providing the four most significant phase states (reference, +90.degree., -180.degree., -90.degree.

Abstract: A quasi-interdigitated transistor (50) for rf power applications has a plurality of channel regions (102-118) that are each offset from each other in a y-direction such that a q.sub.x heating component from adjacent channel regions will affect any one channel region to a lesser extent than the q.sub.x from adjacent channel regions in the conventional interdigitated structure. In a preferred embodiment, the channel regions (102-118) are formed in a single, curved, V-shaped row such that the cumulative transverse width of all of the transistor sections is less than the waveguide cutoff frequency. The V-shaped row of transistor sections also provides the advantage of parallel signal paths having approximately the same propagation time delay such that there is no phase cancellation within the device.

Abstract: The disclosure relates to a dual gate FET used in variable power amplifiers wherein a gain control circuit is provided across the dual gate electrodes whereby the voltage on one of the gate electrodes is a function of the voltage on the other gate electrode.