Patents by Inventor Samuel Drane

Samuel Drane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240135076
    Abstract: Described herein is a technique for automatic program code optimization for high-level synthesis. One embodiment provides a method comprising receiving input including first program code in a high-level language; translating the first program code into an intermediate language; constructing an equality graph (e-graph) from the intermediate language; interleaving control-flow, data path, and gate-level transformations to explore equivalent hardware designs represented by the e-graph; selecting a hardware design based on a cost function; extracting a representation of a selected hardware design in the intermediate language; generating second program code in the high-level language; and performing high-level synthesis using the second program code.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 25, 2024
    Applicant: Intel Corporation
    Inventors: Jianyi Cheng, Samuel Coward, Lorenzo Chelini, Rafael Barbalho, Theo Drane
  • Publication number: 20240126519
    Abstract: Described herein is a technique and associated tool for automatic program code optimization for high-level synthesis. The tool can efficiently explore multiple representations of an input program using e-graph rewriting and determine an HLS-efficient representation of program code for input into high-level synthesis tools.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Applicant: Intel Corporation
    Inventors: Jianyi Cheng, Samuel Coward, Lorenzo Chelini, Rafael Barbalho, Theo Drane
  • Publication number: 20240126964
    Abstract: Described herein is a technique for automated detection of case-splitting opportunities in RTL. The techniques described herein facilitate the integration of case-splitting into a hardware design tool flow, allowing the generation of hardware designs that do not suffer from timing violations. One embodiment provides a method comprising analyzing a first hardware description in a hardware description language to identify a critical path in a circuit represented by the hardware description, automatically detecting a case-splitting opportunity within the critical path, generating hardware description language for a case split having determined operator domain restrictions, and outputting a second hardware description including the hardware description language for the case split, wherein the second hardware description has a reduced operator hardware cost for the critical path relative to the first hardware description.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Applicant: Intel Corporation
    Inventors: Samuel Coward, Theo Drane, George A. Constantinides
  • Publication number: 20240111925
    Abstract: Described herein are techniques for automated hardware power optimization via e-graph based automatic RTL exploration. These techniques provide a tool that automatically performs RTL optimization and generates power optimized RTL without requiring design engineers to perform labor and knowledge intensive manual optimizations.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Samuel Coward, Theo Drane, George A. Constantinides
  • Publication number: 20240111353
    Abstract: Described herein is a technique to enable the construction of hierarchical clock gating architectures via e-graph rewriting. Automated clock gating relies on multiplexor (mux) tree analysis and constructs simple register enable signals. A framework is provided to detect non-mux based opportunities and construct more complex clock gating signals.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Samuel Coward, Theo Drane, George A. Constantinides, Emiliano Morini
  • Publication number: 20240086161
    Abstract: Described herein is a technique for automatic generation of optimized RTL via redundant code removal. By automatically introducing local mutations into the original RTL and using equivalence checking tools to confirm that the functionality it is not affected, optimized RTL can be produced automatically without requiring human intervention.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Intel Corporation
    Inventors: Theo Drane, Emiliano Morini, Jordan Schmerge, Samuel Coward
  • Patent number: 11912673
    Abstract: A process for preparing a tetra-substituted aminobiphenol macrocyclic ligand having the structure (I), including the step of treating a precursor compound having the structure (II) with a compound having the structure R6-L where L is a leaving group (hereafter compound (III)) in the presence of a base.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: February 27, 2024
    Assignee: Econic Technologies Ltd.
    Inventors: Michael Kember, Anthony Chartoire, Anthea Blackburn, Samuel Drane
  • Publication number: 20210238149
    Abstract: A process for preparing a tetra-substituted aminobiphenol macrocyclic ligand having the structure (I), including the step of treating a precursor compound having the structure (II) with a compound having the structure R6-L where L is a leaving group (hereafter compound (III)) in the presence of a base.
    Type: Application
    Filed: April 20, 2021
    Publication date: August 5, 2021
    Inventors: Michael Kember, Anthony Chartoire, Anthea Blackburn, Samuel Drane
  • Patent number: 11014894
    Abstract: A process for preparing a tetra-substituted aminobiphenol macrocyclic ligand having the structure (I), comprising the step of treating a precursor compound having the structure (II) with a compound having the structure R6-L where L represents a leaving group (hereinafter compound (III)) in the presence of a base.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: May 25, 2021
    Assignee: ECONIC TECHNOLOGIES LIMITED
    Inventors: Michael Kember, Anthony Chartoire, Anthea Blackburn, Samuel Drane
  • Publication number: 20190382357
    Abstract: A process for preparing a tetra-substituted aminobiphenol macrocyclic ligand having the structure (I), comprising the step of treating a precursor compound having the structure (II) with a compound having the structure R6-L where L represents a leaving group (hereinafter compound (III)) in the presence of a base.
    Type: Application
    Filed: March 2, 2018
    Publication date: December 19, 2019
    Inventors: Michael Kember, Anthony Chartoire, Anthea Blackburn, Samuel Drane