Abstract: A method and apparatus for detecting an event and sampling first value from a pin in response to the event. For example, the event is identified by a signal object of a plurality of signal objects stored in a memory. Each signal object of the plurality of signal objects identifies a single analog input pin and a trigger.

Abstract: A method and apparatus for communicating over a power line. In one embodiment of the method, a first PWM waveform signal is generated, wherein a duty cycle of the first PWM waveform signal is proportional to an amplitude of a first analog signal. A first sinusoidal waveform signal is also generated, which has a first frequency. The first sinusoidal waveform signal is modulated in relation to the first PWM waveform signal. The modulated first sinusoidal waveform signal is transmitted to a circuit via a power conductor that couples a power source to the circuit. The circuit in turn generates a demodulated signal by demodulating the modulated first sinusoidal waveform signal.

Abstract: An apparatus and method of scheduling signals. In one embodiment, the method includes a first circuit receiving a first plurality of reference values. The first circuit selects a reference value from the first plurality according to a first reference identifier (ID) that is stored in memory. The first circuit compares the selected reference value to a first match value.

Abstract: An apparatus and method of scheduling signals. In one embodiment, the method includes a first circuit receiving a first plurality of reference values. The first circuit selects a reference value from the first plurality according to a first reference identifier (ID) that is stored in memory. The first circuit compares the selected reference value to a first match value.

Abstract: A method and apparatus for distributing events. In one embodiment, the method includes a bus concurrently transmitting a first event-signal and a first event-identification (event-ID); wherein the first event-signal, when active, indicates that a first event has occurred, is occurring, or should occur. The first event-ID corresponds to the first event-signal.

Abstract: A system that includes a multiplexer having an output selectively coupled to a plurality of inputs, a bus coupled to the output of the multiplexer, and first and second circuits configured to generate first and second digital signals, respectively. The first digital signal is related to a rotational angle of a crankshaft at a first point in time, and the second digital signal is related to a value of parameter at the first point in time, wherein the parameter is one other than the rotational angle of the crankshaft. The first and second circuits are coupled directly or indirectly to first and second inputs of the multiplexer.

Abstract: An apparatus and method of scheduling signals. In one embodiment, the method includes a first circuit receiving a first plurality of reference values. The first circuit selects a reference value from the first plurality according to a first reference identifier (ID) that is stored in memory. The first circuit compares the selected reference value to a first match value.

Abstract: A method and apparatus for communicating over a power line. In one embodiment of the method, a first PWM waveform signal is generated, wherein a duty cycle of the first PWM waveform signal is proportional to an amplitude of a first analog signal. A first sinusoidal waveform signal is also generated, which has a first frequency. The first sinusoidal waveform signal is modulated in relation to the first PWM waveform signal. The modulated first sinusoidal waveform signal is transmitted to a circuit via a power conductor that couples a power source to the circuit. The circuit in turn generates a demodulated signal by demodulating the modulated first sinusoidal waveform signal.

Abstract: A method and apparatus for sampling and converting analog input values. In response to an event, a value is transmitted from an input of a multiplexer to the output of the multiplexer. The output of the multiplexer is coupled to an input of an analog-to-digital converter (ADC). In response to a second event, a value is transmitted from the input of the multiplexer to a second ADC.

Abstract: A method and system for sampling values. Multiple values are sampled concurrently. One of the values is stored while another one of the values is converted to a corresponding digital value by an analog-to-digital converter (ADC). Subsequently, the stored value is made available to the ADC.

Abstract: An apparatus is disclosed that includes first and second circuits coupled together via a bus, an input pin configured to receive an analog input signal, a digital-to-analog (DAC) convertor configured to convert a multibit reference signal into an analog reference signal, a comparator circuit coupled to the bus, an output of the DAC and to the input pin. The comparator circuit is configured to receive the analog reference signal from the DAC and the analog input signal, and configured to generate a first digital signal set to a first state if the analog reference signal is greater in magnitude than the analog input signal, or set to a second state if analog reference signal is lower in magnitude than the analog input signal. The comparator circuit is also configured to transmit the first digital signal to the first circuit via the bus. The first circuit in turn is configured to receive the first digital signal.

Abstract: A method and apparatus for detecting an event and sampling first value from a pin in response to the event. A plurality of signal objects is stored in a memory. Each signal object identifies a single analog input pin and a trigger.

Abstract: A method and system for sampling values. Multiple values are sampled concurrently. One of the values is stored while another one of the values is converted to a corresponding digital value by an analog-to-digital converter (ADC). Subsequently, the stored value is made available to the ADC.

Abstract: A method and apparatus for sampling and converting analog input values. In response to an event, a value is transmitted from an input of a multiplexer to the output of the multiplexer. The output of the multiplexer is coupled to an input of an analog-to-digital converter (ADC). In response to a second event, a value is transmitted from the input of the multiplexer to a second ADC.

Abstract: A method and apparatus for distributing events. In one embodiment, the method includes a bus concurrently transmitting a first event-signal and a first event-identification (event-ID); wherein the first event-signal, when active, indicates that a first event has occurred, is occurring, or should occur. The first event-ID corresponds to the first event-signal.

Abstract: A system that includes a multiplexer having an output selectively coupled to a plurality of inputs, a bus coupled to the output of the multiplexer, and first and second circuits configured to generate first and second digital signals, respectively. The first digital signal is related to a rotational angle of a crankshaft at a first point in time, and the second digital signal is related to a value of parameter at the first point in time, wherein the parameter is one other than the rotational angle of the crankshaft. The first and second circuits are coupled directly or indirectly to first and second inputs of the multiplexer.

Abstract: An apparatus is disclosed that includes first and second circuits coupled together via a bus, an input pin configured to receive an analog input signal, a digital-to-analog (DAC) convertor configured to convert a multibit reference signal into an analog reference signal, a comparator circuit coupled to the bus, an output of the DAC and to the input pin. The comparator circuit is configured to receive the analog reference signal from the DAC and the analog input signal, and configured to generate a first digital signal set to a first state if the analog reference signal is greater in magnitude than the analog input signal, or set to a second state if analog reference signal is lower in magnitude than the analog input signal. The comparator circuit is also configured to transmit the first digital signal to the first circuit via the bus. The first circuit in turn is configured to receive the first digital signal.

Abstract: An apparatus and method of scheduling signals. In one embodiment, the method includes a first circuit receiving a first plurality of reference values. The first circuit selects a reference value from the first plurality according to a first reference identifier (ID) that is stored in memory. The first circuit compares the selected reference value to a first match value.

Abstract: A controller 12 has an I/O crossover switching network 14, an optional I/O network expansion 16, a plurality of serial I/O shifters 18, a clock generator 20 and I/O control logic 22. The I/O crossover-switching network 14 is also referred to as an I/O multiplexer. Serial data may be transferred between a serial I/O shifter and an external device by way of a dedicated serial data pin (SDATA) 24 or an optional alternate pathway 26 which uses one of a plurality of parallel pins 28. The optional alternate pathway 26 can be used when pins 28 are unavailable or to reduce the number of pins on the device 12. The controller is shown to communicate with an external device 30 also having parallel pins 32. While a single device 30 is shown, the external device 30 can be any number of a plurality of devices having serial and parallel signal pathways that is controlled by the microprocessor 10 of the present invention.

Abstract: An engine control system comprising a host processor in operative communication with a data bus and a plurality of peripheral devices for communicating engine operating parameters. Each of the peripheral devices include a first and second transaction register for storing communication parameters for each of the corresponding plurality of peripheral devices. The control system also includes a queued port rate register (QRR) including a memory unit in operative communication with the plurality of peripheral devices for storing data for transmission to the plurality of peripheral devices in accordance with the first and second transaction registers. The system further includes a peripheral counter in operative communication with each of the plurality of peripheral devices. The peripheral counter is adapted to interrogate each of the plurality of peripheral devices and, when data has been written to one of the peripheral devices, update the peripheral device according to the memory unit data.