Patents by Inventor Samuel P. Reyna

Samuel P. Reyna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for multi-rate, high-sensitivity clock and data recovery with adjustable decision threshold, RF input, and optical-to-electrical conversion
    Patent number: 8285154
    Abstract: The present invention provides a system and method for multi-rate, high-sensitivity CDR, including a variable/adjustable decision threshold, RF input clock recovery, and OE conversion feature. The system includes an optical input connector, CDR circuit, decision threshold circuit, internal power supply, OE converter, external electrical output, and multiple clock outputs. The system is assembled in a single, stand-alone unit. The system includes an OC-192 data output, and OC-192 (9.953-10.709 GHz) and ¼ OC-48 (2.488-2.677 GHz) clock outputs. The decision threshold level is adjustable and optimized by a system user. The system is also used in combination with a digital communications analyzer. A recovered clock of the CDR circuit provides trigger for the DCA. The system includes an electrical input connector. Optionally, the system triggers directly from an RF electrical input in substitution of an optical input.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: October 9, 2012
    Assignee: Ciena Corporation
    Inventors: Samuel P. Reyna, Paul Andrew Jager, Michael Stephen Brown
  • SYSTEM AND METHOD FOR MULTI-RATE, HIGH-SENSITIVITY CLOCK AND DATA RECOVERY WITH ADJUSTABLE DECISION THRESHOLD, RF INPUT, AND OPTICAL-TO-ELECTRICAL CONVERSION
    Publication number: 20110176810
    Abstract: The present invention provides a system and method for multi-rate, high-sensitivity CDR, including a variable/adjustable decision threshold, RF input clock recovery, and OE conversion feature. The system includes an optical input connector, CDR circuit, decision threshold circuit, internal power supply, OE converter, external electrical output, and multiple clock outputs. The system is assembled in a single, stand-alone unit. The system includes an OC-192 data output, and OC-192 (9.953-10.709 GHz) and ¼ OC-48 (2.488-2.677 GHz) clock outputs. The decision threshold level is adjustable and optimized by a system user. The system is also used in combination with a digital communications analyzer. A recovered clock of the CDR circuit provides trigger for the DCA. The system includes an electrical input connector. Optionally, the system triggers directly from an RF electrical input in substitution of an optical input.
    Type: Application
    Filed: July 23, 2010
    Publication date: July 21, 2011
    Inventors: Samuel P. Reyna, Paul Andrew Jager, Michael Stephen Brown
  • System and method for multi-rate, high-sensitivity clock and data recovery with adjustable decision threshold, RF input, and optical-to-electrical conversion
    Patent number: 7783206
    Abstract: The present invention provides a system and method for multi-rate, high-sensitivity CDR, including a variable/adjustable decision threshold, RF input clock recovery, and OE conversion feature. The system includes an optical input connector, CDR circuit, decision threshold circuit, internal power supply, OE converter, external electrical output, and multiple clock outputs. The system is assembled in a single, stand-alone unit. The system includes an OC-192 data output, and OC-192 (9.953-10.709 GHz) and ¼ OC-48 (2.488-2.677 GHz) clock outputs. The decision threshold level is adjustable and optimized by a system user. The system is also used in combination with a digital communications analyzer. A recovered clock of the CDR circuit provides trigger for the DCA. The system includes an electrical input connector. Optionally, the system triggers directly from an RF electrical input in substitution of an optical input.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: August 24, 2010
    Assignee: Ciena Corporation
    Inventors: Samuel P. Reyna, Paul Andrew Jager, Michael Stephen Brown
  • System and method for multi-rate, high-sensitivity clock and data recovery with adjustable decision threshold, RF input, and optical-to-electrical conversion
    Publication number: 20080170859
    Abstract: The present invention provides a system and method for multi-rate, high-sensitivity CDR, including a variable/adjustable decision threshold, RF input clock recovery, and OE conversion feature. The system includes an optical input connector, CDR circuit, decision threshold circuit, internal power supply, OE converter, external electrical output, and multiple clock outputs. The system is assembled in a single, stand-alone unit. The system includes an OC-192 data output, and OC-192 (9.953-10.709 GHz) and ¼ OC-48 (2.488-2.677 GHz) clock outputs. The decision threshold level is adjustable and optimized by a system user. The system is also used in combination with a digital communications analyzer. A recovered clock of the CDR circuit provides trigger for the DCA. The system includes an electrical input connector. Optionally, the system triggers directly from an RF electrical input in substitution of an optical input.
    Type: Application
    Filed: January 11, 2007
    Publication date: July 17, 2008
    Inventors: Samuel P. Reyna, Paul Andrew Jager, Michael Stephen Brown