Patents by Inventor Sandeep KALYADAN

Sandeep KALYADAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11614479
    Abstract: A device includes FETs with control terminals. A gate driver circuit causes the FETs to turn on and to enter a high-impedance state in response to an OCP signal. A current sense circuit senses an FET current through the FETs and sends the OCP signal to the gate driver circuit when the FET current exceeds an OCP current for longer than an OCP deglitch period. A test sequencer, in response to receiving an external test mode signal, sets the OCP current to a preset OCP test current, sets the OCP deglitch period to a preset OCP deglitch test period, and causes the gate driver circuit to turn on the plurality of FETs.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: March 28, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Sandeep Kalyadan, Krishnamurthy Ganapathi Shankar, Venkatesh Guduri
  • Publication number: 20230056957
    Abstract: A device includes FETs with control terminals. A gate driver circuit causes the FETs to turn on and to enter a high-impedance state in response to an OCP signal. A current sense circuit senses an FET current through the FETs and sends the OCP signal to the gate driver circuit when the FET current exceeds an OCP current for longer than an OCP deglitch period. A test sequencer, in response to receiving an external test mode signal, sets the OCP current to a preset OCP test current, sets the OCP deglitch period to a preset OCP deglitch test period, and causes the gate driver circuit to turn on the plurality of FETs.
    Type: Application
    Filed: August 23, 2021
    Publication date: February 23, 2023
    Inventors: Sandeep KALYADAN, Krishnamurthy Ganapathi SHANKAR, Venkatesh GUDURI