Abstract: A method, apparatus, and computer program product for managing permissions for processing input/output (I/O) operations in a storage system is disclosed that includes a plurality of storage system controllers and a plurality of storage devices. The method comprises determining that a permission associated with a storage system controller for issuing I/O operations to the storage devices should be invalidated and, in response to the determination, modifying at least one I/O capability of the storage system controller.

Abstract: Enabling multi-channel communications between controllers in a storage array, including: creating a plurality of logical communications channels between two or more storage array controllers; inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of a second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing, via a predetermined logical communications channel, the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.

Abstract: Enabling multi-channel communications between controllers in a storage array, including: creating a plurality of logical communications channels between two or more storage array controllers; inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of a second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing, via a predetermined logical communications channel, the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.

Abstract: Enabling multi-channel communications between controllers in a storage array, including: creating a plurality of logical communications channels between two or more storage array controllers; inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of a second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing, via a predetermined logical communications channel, the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.

Abstract: A storage controller coupled to a storage array includes a device driver running in a kernel space that receives an administrative command from an application running in a user space of the storage controller and writes the administrative command to a first submission queue of a plurality of submission queues associated with a storage device in the storage array, where the first submission queue is reserved for use by the device driver. An input/output (I/O) command received from the application running in the user space, however, is written directly to a second submission queue of the plurality of submission queues without being routed through the kernel space, where the second submission queue being reserved for direct access by the application running in the user space.

Abstract: Emulating a remote direct memory access (‘RDMA’) link between controllers in a storage array, including: inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.

Abstract: Emulating a remote direct memory access (‘RDMA’) link between controllers in a storage array, including: inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.

Abstract: Emulating a remote direct memory access (‘RDMA’) link between controllers in a storage array, including: inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.

Abstract: Emulating a remote direct memory access (‘RDMA’) link between controllers in a storage array, including: inserting, into a buffer utilized by a direct memory access (‘DMA’) engine of a first storage array controller, a data transfer descriptor describing data stored in memory of the first storage array controller and a location to write the data to memory of the second storage array controller; retrieving, in dependence upon the data transfer descriptor, the data stored in memory of the first storage array controller; and writing the data into the memory of the second storage array controller in dependence upon the data transfer descriptor.