Abstract: A photonic device includes a photonic integrated circuit (PIC) comprising a plurality of waveguides, an optical coupler array positioned near an edge of the PIC, and a plurality of optical fibers. The optical coupler array comprises a plurality of optical couplers. Each optical coupler of the optical coupler array defines an optical path coupling a respective waveguide of the plurality of waveguides to a respective optical fiber of the plurality of optical fibers. At least two optical couplers of the plurality of optical couplers are offset relative to each other, either in a first direction perpendicular to the waveguide plane or a second direction perpendicular to the edge of the PIC, or both.

Abstract: A photonic device includes a package comprising a partial interposer and an electronic-photonic assembly disposed thereon. The assembly comprises a photonic integrated circuit (PIC) having first and second sides, wherein the first side is attached to the partial interposer, and wherein the PIC comprises a waveguide defining a waveguide plane. The assembly further comprises an electronic integrated circuit (EIC) attached to the second side of the PIC and an encapsulant at least partially surrounding the EIC. The device includes an optical coupler attached to the PIC, configured to collimate light emitted by the PIC in a direction angled relative to the waveguide plane. The device includes an optical assembly comprising a detachable plug and fiber, positioned to receive the collimated light from the optical coupler.

Abstract: A device may include an electronic-photonic assembly comprising: a photonic integrated circuit (PIC) comprising a waveguide extending near a sidewall of the PIC, an electronic integrated circuit (EIC) attached to the PIC; and an encapsulant at least partially encapsulating the EIC. A device may include an optical assembly comprising a detachable plug and a fiber attached to the detachable plug. A device may include an optical coupler between the sidewall of the PIC and the optical assembly, wherein the optical coupler is configured to couple light received from the waveguide to the fiber.

Abstract: A device may include an electronic-photonic assembly comprising: a photonic integrated circuit (PIC) comprising a waveguide defining a waveguide plane, an electronic integrated circuit (EIC) attached to the PIC; and an encapsulant at least partially encapsulating the EIC. A device may include an optical coupler attached to the PIC, wherein the optical coupler is configured to collimate, in a first direction that is angled relative to the waveguide plane, light emitted by the PIC upon being guided by the waveguide. A device may include an optical assembly comprising a detachable plug and a fiber attached to the detachable plug, wherein the optical assembly is positioned to receive the collimated light from the optical coupler.

Abstract: Described herein are fiber-connection structures for photonic integrated circuits (PICs). These fiber connection structures enable efficient optical coupling between integrated waveguides and corresponding optical fibers by facilitating reliable edge coupling. The fiber-connection designs developed by the inventor improve upon conventional approaches by increasing fan-out fiber capability, coupling efficiency and scalability. A photonic package comprises a substrate, a PIC, an application-specific integrated circuit (ASIC) and a glass coupler. The PIC is attached to the substrate and comprises a PIC waveguide having an end adjacent an edge of the PIC. The ASIC is attached to the PIC. The glass coupler is attached to the PIC and comprises a glass waveguide optically coupled to the PIC waveguide.

Abstract: Described herein are glass substrates that include a cavity and glass fingers extending into the cavity. A photonic integrated circuit (PIC) is positioned near the cavity such that a waveguide of the PIC is optically coupled to a waveguide of the glass substrate formed in one of the glass fingers. The structure described herein allows for improved coupling efficiency between the PIC and the glass substrate, and improved access for underfill and outgassing processes. This approach facilitates reliable packaging of large or multi-reticle PICs while maintaining high optical and mechanical performance.

Abstract: Described herein are systems and methods for recovering manufacturing yield of semiconductor electro-optical systems. The methods and techniques leverage Optical Circuit Switching (OCS) to dynamically route connections away from faulty hardware and to maximize usage of the remaining functioning hardware. The OCS may be controlled to route connections based on information indicative of the performance of the optical channels and the electrical processing units of the semiconductor system.

Abstract: Hybrid interconnect schemes that combine both electrical and optical stitching are described. Electrical stitching is well-suited for short-reach, high-bandwidth connections between adjacent or closely spaced units. On the other hand, optical stitching is well-suited for long-reach, low-loss connections between non-adjacent units. By leveraging the complementary nature of electrical and optical stitching, a multi-reticle device may be constructed that provides substantially greater scalability in terms of compute and memory density and overall interconnect bandwidth than is achievable using conventional approaches. An intermediate connection layer is configured to electrically connect electrical integrated circuits (EIC) of the plurality of EICs that are within a cutoff range of one another. An electro-optical interposer is configured to optically connect EICs of the plurality of EICs that are outside the cutoff range of one another.

Abstract: Described herein are manufacturing techniques and packages that enable wafer-scale heterogenous integration of electronic integrated circuits (EIC) with photonic integrated circuits (PIC) using a reconstitution-based fabrication approach. Wafer-scale photonic devices are formed by assembling strips of known-good dies (KGD). Such strips include arrays of adjacent reticles that have been singulated from a wafer. A strip can include a single row (or column) of reticles singulated from a wafer or multiple rows (or columns) that are adjacent to one another, enabling two-dimensional assembly and increased coverage. Wafer reconstitution involves transferring and bonding one or more strips of KGDs to a target substrate. A KGD is a reticle that is not part of an exclusion zone and has been verified to work properly. Thus, a reconstituted wafer includes strips that have verified to be fully functional.

Abstract: Described herein are pluggable fiber-attach-first techniques and related manufacturing methods for assembling photonic chips according to the fiber-attach-first technique. The techniques may be used in several fields including, but not limited to, 2D, 2.5D, and 3D package architectures, wafer scale packaging technologies, and transceiver technologies. A photonic device comprises a photonic stack, a glass substrate and epoxy configured to hold the photonic stack and the glass substrate together. The photonic stack comprises one or more alignment features. The glass substrate comprises one or more alignment features, wherein each of the one or more alignment features of the glass substrate engage with a corresponding alignment feature of the photonic stack such that one or more waveguides of the photonic stack are optically coupled with one or more glass waveguides of the glass substrate.

Abstract: Described herein is a novel approach that leverages a 3D stacked die complex with an active optical interposer integrated with an I/O chiplet including high-speed serializer/deserializer (SerDes). By integrating silicon in this way, shoreline constraints are eliminated, allowing for the SerDes macros to be placed virtually anywhere on the I/O chiplet. The photonic-based interconnects described herein improve upon conventional approaches based on co-packaged optics (CPO), Linear-drive Pluggable Optics (LPO) and copper-based solutions in terms of bandwidth and power consumption. The interconnects described herein rely on photonic-electronic packages in which a PIC provides processing units (e.g., XPU), electronic switching chips or other types of application-specific integrated circuits (ASIC) with access to optical fiber-based networks while multiple SerDes provide high-speed serialization and deserialization.

Abstract: Described herein are wavelength division multiplexing (WDM) transceivers configured to support fast, bidirectional communication over optical channels. An optical transceiver comprises a transmitter, a receiver, an input/output (I/O) port and an optical interleaver. The transmitter comprises a first bus waveguide and a plurality of optical modulators coupled to the first bus waveguide, each of the optical modulators being resonant at a respective wavelengths in a first wavelength set. The receiver comprises a second bus waveguide and a plurality of optical filters coupled to the second bus waveguide, each of the optical filters being resonant at a respective wavelength in a second wavelength set. The (I/O) port is coupled to an optical channel.

Abstract: Described herein are wavelength division multiplexing (WDM) transceivers configured to support fast, bidirectional communication over optical channels. An optical transceiver comprises a transmitter, a receiver, an input/output (I/O) port and an optical interleaver. The transmitter comprises a first bus waveguide and a plurality of optical modulators coupled to the first bus waveguide, each of the optical modulators being resonant at a respective wavelengths in a first wavelength set. The receiver comprises a second bus waveguide and a plurality of optical filters coupled to the second bus waveguide, each of the optical filters being resonant at a respective wavelength in a second wavelength set. The (I/O) port is coupled to an optical channel.

Abstract: Described herein are wavelength division multiplexing (WDM) transceivers configured to support fast, bidirectional communication over optical channels. An optical transceiver comprises a transmitter, a receiver, an input/output (I/O) port and an optical interleaver. The transmitter comprises a first bus waveguide and a plurality of optical modulators coupled to the first bus waveguide, each of the optical modulators being resonant at a respective wavelengths in a first wavelength set. The receiver comprises a second bus waveguide and a plurality of optical filters coupled to the second bus waveguide, each of the optical filters being resonant at a respective wavelength in a second wavelength set. The (I/O) port is coupled to an optical channel.

Abstract: Provided herein are optical fiber arrays and optical assemblies included optical fiber arrays. The optical fiber array includes a fiber array chip that has first optical connections disposed on a first edge of the fiber array chip and second optical connections disposed on a second edge of the fiber array chip. Optical fibers are coupled to the first optical connections. Active devices (e.g., photonic and/or electronic devices) are disposed on the fiber array chip. The optical fiber array is removably, optically couplable to another optical component such as a photonic integrated circuit.

Abstract: A processor package module comprises a substrate, one or more compute die mounted to the substrate, and one or more photonic die mounted to the substrate. The photonic die have N optical I/O links to transmit and receive optical I/O signals using a plurality of virtual optical channels, the N optical I/O links corresponding to different types of I/O interfaces excluding power and ground I/O. The substrate is mounted into a socket that support the power and ground I/O and electrical connections between the one or more compute die and the one or more photonic die.

Abstract: A processor package module comprises a substrate, one or more compute die mounted to the substrate, and one or more photonic die mounted to the substrate. The photonic die have N optical I/O links to transmit and receive optical I/O signals using a plurality of virtual optical channels, the N optical I/O links corresponding to different types of I/O interfaces excluding power and ground I/O. The substrate is mounted into a socket that support the power and ground I/O and electrical connections between the one or more compute die and the one or more photonic die.

Abstract: Embodiments herein relate to systems, apparatuses, or techniques for using an optical physical layer die within a system-on-a-chip to optically couple with an optical physical layer die on another package to provide high-bandwidth memory access between the system-on-a-chip and the other package. In embodiments, the other package may be a large optically connected memory device that includes a memory controller coupled with an optical physical layer die, where the memory controller is coupled with memory. Other embodiments may be described and/or claimed.

Abstract: The systems and methods described herein are directed to using a plurality of interface elements (e.g., sockets) and/or stud-bump elements embedded into board substrates (e.g., a motherboard) to enable the interchange of variable configuration components (e.g., electronic components, chips, and the like) that are mounted on package substrates having ball grid arrays (BGAs). In some aspects, this interchange can be accomplished while leaving the pre-existing board substrate design and various peripheral system components of the board substrate unchanged.

Abstract: The systems and methods described herein are directed to using a plurality of interface elements (e.g., sockets) and/or stud-bump elements embedded into board substrates (e.g., a motherboard) to enable the interchange of variable configuration components (e.g., electronic components, chips, and the like) that are mounted on package substrates having ball grid arrays (BGAs). In some aspects, this interchange can be accomplished while leaving the pre-existing board substrate design and various peripheral system components of the board substrate unchanged.