Patents by Inventor Sandesh Kadirudyavara Ven Gowda

Sandesh Kadirudyavara Ven Gowda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140298148
    Abstract: In one embodiment, a scheme for reliably reading data values, such as rapidly-changing counter values, from a memory location. Instead of performing a single read operation, a set of N consecutive read operations is performed to obtain a set of N samples. Since, for counter values and the like, the frequency of occurrence of out-of-sequence values is relatively low, it is expected that a majority of the N samples will be in sequence. Of these N samples, the largest subset of monotonically-increasing values is selected. The median value of this subset of monotonically non-decreasing values is returned as a reliable result of the read operation.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Applicant: LSI Corporation
    Inventors: Santosh Narayanan, Benzeer Bava Arackal Pazhayakath, Vishal Deep Ajmera, Sandesh Kadirudyavara Ven Gowda
  • Patent number: 8782504
    Abstract: In one embodiment, a scheme for reliably reading data values, such as rapidly-changing counter values, from a memory location. Instead of performing a single read operation, a set of N consecutive read operations is performed to obtain a set of N samples. Since, for counter values and the like, the frequency of occurrence of out-of-sequence values is relatively low, it is expected that a majority of the N samples will be in sequence. Of these N samples, the largest subset of monotonically-increasing values is selected. The median value of this subset of monotonically non-decreasing values is returned as a reliable result of the read operation.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: July 15, 2014
    Assignee: LSI Corporation
    Inventors: Santosh Narayanan, Benzeer Bava Arackal Pazhayakath, Vishal Deep Ajmera, Sandesh Kadirudyavara Ven Gowda
  • Publication number: 20130275843
    Abstract: In one embodiment, a scheme for reliably reading data values, such as rapidly-changing counter values, from a memory location. Instead of performing a single read operation, a set of N consecutive read operations is performed to obtain a set of N samples. Since, for counter values and the like, the frequency of occurrence of out-of-sequence values is relatively low, it is expected that a majority of the N samples will be in sequence. Of these N samples, the largest subset of monotonically-increasing values is selected. The median value of this subset of monotonically non-decreasing values is returned as a reliable result of the read operation.
    Type: Application
    Filed: April 11, 2012
    Publication date: October 17, 2013
    Applicant: LSI Corporation
    Inventors: Santosh Narayanan, Benzeer Bava Arackal Pazhayakath, Vishal Deep Ajmera, Sandesh Kadirudyavara Ven Gowda