Patents by Inventor Sandhu S. Gurtej

Sandhu S. Gurtej has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120021594
    Abstract: A method of forming a plurality of transistor gates having at least two different work functions includes forming first and second transistor gates over a substrate having different widths, with the first width being narrower than the second width. A material is deposited over the substrate including over the first and second gates. Within an etch chamber, the material is etched from over both the first and second gates to expose conductive material of the first gate and to reduce thickness of the material received over the second gate yet leave the second gate covered by the material. In situ within the etch chamber after the etching, the substrate is subjected to a plasma comprising a metal at a substrate temperature of at least 300° C. to diffuse said metal into the first gate to modify work function of the first gate as compared to work function of the second gate.
    Type: Application
    Filed: September 29, 2011
    Publication date: January 26, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Sandhu S. Gurtej, Mark Kiehlbauch
  • Patent number: 8034687
    Abstract: A method of forming a plurality of transistor gates having at least two different work functions includes forming first and second transistor gates over a substrate having different widths, with the first width being narrower than the second width. A material is deposited over the substrate including over the first and second gates. Within an etch chamber, the material is etched from over both the first and second gates to expose conductive material of the first gate and to reduce thickness of the material received over the second gate yet leave the second gate covered by the material. In situ within the etch chamber after the etching, the substrate is subjected to a plasma comprising a metal at a substrate temperature of at least 300° C. to diffuse said metal into the first gate to modify work function of the first gate as compared to work function of the second gate.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: October 11, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Sandhu S. Gurtej, Mark Kiehlbauch
  • Publication number: 20110039404
    Abstract: A method of forming a plurality of transistor gates having at least two different work functions includes forming first and second transistor gates over a substrate having different widths, with the first width being narrower than the second width. A material is deposited over the substrate including over the first and second gates. Within an etch chamber, the material is etched from over both the first and second gates to expose conductive material of the first gate and to reduce thickness of the material received over the second gate yet leave the second gate covered by the material. In situ within the etch chamber after the etching, the substrate is subjected to a plasma comprising a metal at a substrate temperature of at least 300° C. to diffuse said metal into the first gate to modify work function of the first gate as compared to work function of the second gate.
    Type: Application
    Filed: October 13, 2010
    Publication date: February 17, 2011
    Applicant: Micron Technology, Inc.
    Inventors: Sandhu S. Gurtej, Mark Kiehlbauch
  • Patent number: 7824986
    Abstract: A method of forming a plurality of transistor gates having at least two different work functions includes forming first and second transistor gates over a substrate having different widths, with the first width being narrower than the second width. A material is deposited over the substrate including over the first and second gates. Within an etch chamber, the material is etched from over both the first and second gates to expose conductive material of the first gate and to reduce thickness of the material received over the second gate yet leave the second gate covered by the material. In situ within the etch chamber after the etching, the substrate is subjected to a plasma comprising a metal at a substrate temperature of at least 300° C. to diffuse said metal into the first gate to modify work function of the first gate as compared to work function of the second gate.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: November 2, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Sandhu S. Gurtej, Mark Kiehlbauch
  • Publication number: 20100112808
    Abstract: A method of forming a plurality of transistor gates having at least two different work functions includes forming first and second transistor gates over a substrate having different widths, with the first width being narrower than the second width. A material is deposited over the substrate including over the first and second gates. Within an etch chamber, the material is etched from over both the first and second gates to expose conductive material of the first gate and to reduce thickness of the material received over the second gate yet leave the second gate covered by the material. In situ within the etch chamber after the etching, the substrate is subjected to a plasma comprising a metal at a substrate temperature of at least 300° C. to diffuse said metal into the first gate to modify work function of the first gate as compared to work function of the second gate.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 6, 2010
    Inventors: Sandhu S. Gurtej, Mark Kiehlbauch