Abstract: A frame shutter apparatus comprising a controller for controlling multiple groups of pixels and for reading out values corresponding to the charge collected by different groups of pixels at different times. A method of reading out multiple groups of pixels is provided wherein values corresponding to the charge collected by one group of pixels is readout at a different time than the values corresponding to the charge collected by another group of pixels.

Abstract: An apparatus such as an imager includes groups of sensors each of which includes subgroups of sensors. Subgroup select circuits are coupled to outputs from respective subgroups of sensors, and group select circuits are coupled to outputs from subgroup select circuits associated with respective ones of the groups. A bus is coupled to receive outputs from the group select circuits. A controller can provide control signals to the subgroup select circuits and the group select circuits to selectively enable the respective subgroup select circuits and group select circuits to pass signals from the sensors to the bus one sensor at a time.

Abstract: A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include minimizing the parasitic capacitance on the readout bus, turning off biases when not in use, and operating in a way that minimizes static power consumption of different elements such as A/D converters.

Abstract: A row driver circuit is disclosed for supplying a reset voltage to a plurality of reset transistors of an active pixel sensor array while minimizing gate induced drain leakage (GIDL). The row driver circuit is configured to supply a high voltage level (e.g., Vdd or higher) to the reset transistors of the array during a reset operation. The row driver circuit is further configured to supply a low voltage level (e.g., a voltage level higher than ground) to the reset transistors of the array when the pixels are not being reset (e.g., during integration). The reduced potential difference realized between the respective gates of the reset transistors and the respective photodiodes of the pixels, when the pixels are not being reset, results in reduced GIDL.

Abstract: A reset voltage generator for CMOS imagers is disclosed. The voltage generator contains a “top” voltage generator and a “bottom” voltage generator, both of which are switched in and out of operation. A predetermined reset voltage is thereby generated independent of the power supply voltage (e.g., Vdd) and independent of any noise and/or voltage shifts associated with the power supply voltage.

Abstract: Circuits, methods, and systems are disclosed in which a current is provided to compensate for spurious current while receiving signals through a line. For example, the spurious current can be sensed and the compensating current can be approximately equal to the sensed spurious current. The spurious current could include photocurrent from a bright light, and the compensating current can prevent bright light effects.

Abstract: The present invention provides an improved column readout circuitry and method of operation which minimizes substrate and other common mode noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output. This is accomplished by obtaining a differential readout of the reset signal and integrated charge signal from a desired pixel along with the reset signal and charge signal from a reference circuit. In this manner common mode noise can be minimized by a combination of signals from the desired and reference pixels in the sample and hold aspect of the column circuitry. In one exemplary embodiment of the invention, a 3T pixel arrangement is used. In another exemplary embodiment, a 4T arrangement is used. Additional exemplary embodiments provide differential column readout circuitry that can be used with any two signal sources.

Abstract: An image sensor system using offset analog to digital converters. The analog to digital converters require a plurality of clock cycles to carry out the actual conversion. These conversions are offset in time from one another, so that at each clock cycle, new data is available.

Abstract: An active pixel sensor (APS) that includes circuitry to eliminate artifacts in digital images. The APS includes a comparator for comparing a signal level from a pixel to an adjusted saturation voltage to determine if the pixel is saturated. If the pixel is saturated, an associated saturation flag is stored and used to replace the signal from the pixel with a maximum value corresponding to a brightest pixel in the image.

Abstract: Circuits, methods, and systems are disclosed in which a current is provided to compensate for spurious current while receiving signals through a line. For example, the spurious current can be sensed and the compensating current can be approximately equal to the sensed spurious current. The spurious current could include photocurrent from a bright light, and the compensating current can prevent bright light effects.

Abstract: An image sensor includes pixels each of which is designed to transfer charge, accumulated in a photoactive region of the pixel during a first period, through a second active region of the pixel to a power supply node, and to transfer charge, accumulated in the photoactive region during a second period, through the second active region to a sense node in the pixel. Passing charge through the second active region prior to transferring it either to the power supply node or the sense node can help reduce fixed pattern noise. The image sensor can be operated in snap-shot mode.

Abstract: A CMOS imager has a programmable current multiplication stage provided between a master current reference and the analog circuitry. The master current of each chip can be stored on-chip, for example, in a fuse-type ROM during production testing. By programming the current multiplication stage using the stored master current information, the master current can be chosen correctly for each chip, regardless of variations in manufacturing, thereby improving the production specification to the customer.

Abstract: A number of different elements are added together in a staggered way to avoid the total loss of resolution caused by the binning process. The circuit for doing this includes a variable gain. In a second circuit for carrying this out, to fixed pattern noise reduction circuits are used.

Abstract: A number of different elements are added together in a staggered way to avoid the total loss of resolution caused by the binning process. The circuit for doing this includes a variable gain. In a second circuit for carrying this out, to fixed pattern noise reduction circuits are used.

Abstract: An image sensor system using offset analog to digital converters. The analog to digital converters require a plurality of clock cycles to carry out the actual conversion. These conversions are offset in time from one another, so that at each clock cycle, new data is available.

Abstract: Circuits, methods, and systems are disclosed in which a current is provided to compensate for spurious current while receiving signals through a line. For example, the spurious current can be sensed and the compensating current can be approximately equal to the sensed spurious current. The spurious current could include photocurrent from a bright light, and the compensating current can prevent bright light effects.

Abstract: A digitally controlled light source system. The light source produces an output which is sensed by a photoreceptor within the feedback loop of an operational amplifier. This maintains the output of the light source constant. The feedback loop can also have a digital control system, to enable digital control of the output.

Abstract: The present invention provides an improved column readout circuitry and method of operation which minimizes substrate and other common mode noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output. This is accomplished by obtaining a differential readout of the reset signal and integrated charge signal from a desired pixel along with the reset signal and charge signal from a reference circuit. In this manner common mode noise can be minimized by a combination of signals from the desired and reference pixels in the sample and hold aspect of the column circuitry. In one exemplary embodiment of the invention, a 3T pixel arrangement is used. In another exemplary embodiment, a 4T arrangement is used. Additional exemplary embodiments provide differential column readout circuitry that can be used with any two signal sources.

Abstract: The invention provides a new method and apparatus for NTSC and PAL image sensors which employs fusion of adjacent row pixel charge samples to generate image data for a row. A variety of fusion schemes are possible for fusing the pixel signals from the adjacent rows. The rows of pixels are scanned so that each scan takes an odd row signal sample and, in some cases, an adjacent even row signal sample when specified conditions are met. One sampled row of the two adjacent rows integrate an image with a first integration period while the other adjacent row integrates an image with a second integration period.

Abstract: An imaging circuit using an asymmetric comparator to detect an oversaturated pixel is disclosed. The comparator employs a transistor differential pair which are fabricated to be slightly unbalanced. By varying the channel widths of the two transistors during fabrication, the voltage required to trigger the comparator can be raised or lowered as desired to set an oversaturation level which triggers the comparator.