Patents by Inventor Sandor Petenyi

Sandor Petenyi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11652457
    Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: May 16, 2023
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Patent number: 11374579
    Abstract: A circuit includes a current controller oscillator generating a CCO output signal at a CCO output, a charge pump boosting a supply voltage based on the CCO output signal and producing a charge pump output voltage at an output, and a current sensing circuit sensing load current at the output and generating a feedback signal having a magnitude that varies with the sensed load current if a magnitude of the sensed load current is between lower and upper load current thresholds. A frequency of the CCO output signal is constant at a lower frequency threshold where the sensed load current is below the lower load current threshold, asymptomically rises to an upper frequency threshold where the sensed load current is above the upper load current threshold, and is proportional to the feedback signal where the sensed load current is between the lower and upper load current thresholds.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: June 28, 2022
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Publication number: 20210328563
    Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
    Type: Application
    Filed: June 29, 2021
    Publication date: October 21, 2021
    Applicant: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor PETENYI
  • Patent number: 11082018
    Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: August 3, 2021
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Publication number: 20210234546
    Abstract: A circuit includes a current controller oscillator generating a CCO output signal at a CCO output, a charge pump boosting a supply voltage based on the CCO output signal and producing a charge pump output voltage at an output, and a current sensing circuit sensing load current at the output and generating a feedback signal having a magnitude that varies with the sensed load current if a magnitude of the sensed load current is between lower and upper load current thresholds. A frequency of the CCO output signal is constant at a lower frequency threshold where the sensed load current is below the lower load current threshold, asymptomically rises to an upper frequency threshold where the sensed load current is above the upper load current threshold, and is proportional to the feedback signal where the sensed load current is between the lower and upper load current thresholds.
    Type: Application
    Filed: April 12, 2021
    Publication date: July 29, 2021
    Applicant: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor PETENYI
  • Patent number: 11005483
    Abstract: A circuit includes a current controlled oscillator (CCO), and a charge pump circuit boosting a supply voltage to produce a charge pump output voltage at a charge pump output node in response to output from the CCO. A current sensing circuit includes a first resistor coupled between the charge pump output node and an output node, a first transistor having a first conduction terminal coupled to the charge pump output node through a second resistor, and a second conduction terminal coupled to an input of the CCO. A second transistor has a first conduction terminal coupled to the output node, a second conduction terminal coupled to a reference current source, and a control terminal coupled to the control terminal of the first transistor and to the second conduction terminal of the second transistor.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: May 11, 2021
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Publication number: 20200366296
    Abstract: A circuit includes a current controlled oscillator (CCO), and a charge pump circuit boosting a supply voltage to produce a charge pump output voltage at a charge pump output node in response to output from the CCO. A current sensing circuit includes a first resistor coupled between the charge pump output node and an output node, a first transistor having a first conduction terminal coupled to the charge pump output node through a second resistor, and a second conduction terminal coupled to an input of the CCO. A second transistor has a first conduction terminal coupled to the output node, a second conduction terminal coupled to a reference current source, and a control terminal coupled to the control terminal of the first transistor and to the second conduction terminal of the second transistor.
    Type: Application
    Filed: August 7, 2020
    Publication date: November 19, 2020
    Applicant: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor PETENYI
  • Patent number: 10788848
    Abstract: An amplifier stage of an LDO regulator circuit includes an amplifier stage that generates a drive signal in response to a first voltage difference an output voltage of the LDO regulator circuit and a reference voltage. A drive stage having a quiescent current consumption is configured to generate a control signal in response to the drive signal. The control signal is applied to the control terminal of a power transistor. A dropout detector senses whether the LDO regulator circuit is operating in closed loop regulation mode or in open loop dropout mode by sensing a second difference in voltage between the drive signal and the control signal. A quiescent current limiter circuit responds to the sensed second difference by controlling the quiescent current consumption of the drive stage, and in particular limiting current consumption when the LDO regulator circuit is operating in the open loop dropout mode.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: September 29, 2020
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Patent number: 10784876
    Abstract: A charge pump circuit has load driven clock frequency management. The charge pump circuit includes a CCO generating a CCO output signal that has a frequency generally proportional to a feedback current, and a charge pump operated by the CCO output signal and boosting a supply voltage to produce a charge pump output voltage at an output coupled to a load. A current sensing circuit senses a load current drawn by the load and generates the feedback current as having a magnitude that varies as a function of the sensed load current if a magnitude of the load current is between a lower load current threshold and an upper load current threshold. The magnitude of the feedback current does not vary with the sensed load current if the magnitude of the sensed load current is not between the lower load current threshold and the upper load current threshold.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: September 22, 2020
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Publication number: 20200295767
    Abstract: A charge pump circuit has load driven clock frequency management. The charge pump circuit includes a CCO generating a CCO output signal that has a frequency generally proportional to a feedback current, and a charge pump operated by the CCO output signal and boosting a supply voltage to produce a charge pump output voltage at an output coupled to a load. A current sensing circuit senses a load current drawn by the load and generates the feedback current as having a magnitude that varies as a function of the sensed load current if a magnitude of the load current is between a lower load current threshold and an upper load current threshold. The magnitude of the feedback current does not vary with the sensed load current if the magnitude of the sensed load current is not between the lower load current threshold and the upper load current threshold.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 17, 2020
    Applicant: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor PETENYI
  • Publication number: 20200272184
    Abstract: An amplifier stage of an LDO regulator circuit includes an amplifier stage that generates a drive signal in response to a first voltage difference an output voltage of the LDO regulator circuit and a reference voltage. A drive stage having a quiescent current consumption is configured to generate a control signal in response to the drive signal. The control signal is applied to the control terminal of a power transistor. A dropout detector senses whether the LDO regulator circuit is operating in closed loop regulation mode or in open loop dropout mode by sensing a second difference in voltage between the drive signal and the control signal. A quiescent current limiter circuit responds to the sensed second difference by controlling the quiescent current consumption of the drive stage, and in particular limiting current consumption when the LDO regulator circuit is operating in the open loop dropout mode.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 27, 2020
    Applicant: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor PETENYI
  • Publication number: 20200259473
    Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
    Type: Application
    Filed: February 10, 2020
    Publication date: August 13, 2020
    Applicant: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor PETENYI
  • Patent number: 10295577
    Abstract: In an embodiment, a current sense circuit includes a copy transistor having a gate configured to be coupled to a gate of an output transistor, and a drain coupled to an input terminal. The drain of the copy transistor is configured to be coupled to a drain of the output transistor. A first transistor has a current path coupled to a current path of the copy transistor. An error amplifier has a non-inverting input coupled to a source of the copy transistor, an inverting input configured to be coupled to a source of the output transistor, an output coupled to a gate of the first transistor, a positive power supply terminal coupled to the input terminal and a negative power supply terminal coupled to a reference supply terminal. A current-to-voltage converter has an input coupled to the current path of the copy transistor.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 21, 2019
    Assignee: STMicroelectronics Design & Application S.R.O.
    Inventor: Sandor Petenyi
  • Patent number: 10289140
    Abstract: A voltage regulator having bias current boosting is provided. The voltage regulator includes a power stage for providing an output voltage to a load. The voltage regulator includes a differential stage that receives a feedback voltage representative of the output voltage and a reference voltage and controls the power stage based on a difference between the reference voltage and the feedback voltage. The voltage regulator includes a bias current boosting stage that receives the feedback and reference voltages. The bias current boosting stage provides a boosted bias current having a current level that is based on the difference between the reference and feedback voltages. The boosted bias current biases the differential stage and hastens a response of the differential stage, in response to a change in the difference between the reference voltage and the feedback voltage, in controlling the power stage.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: May 14, 2019
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Patent number: 10168363
    Abstract: In an embodiment, a current sense circuit includes a copy transistor having a gate configured to be coupled to a gate of an output transistor, and a drain coupled to an input terminal. The drain of the copy transistor is configured to be coupled to a drain of the output transistor. A first transistor has a current path coupled to a current path of the copy transistor. An error amplifier has a non-inverting input coupled to a source of the copy transistor, an inverting input configured to be coupled to a source of the output transistor, an output coupled to a gate of the first transistor, a positive power supply terminal coupled to the input terminal and a negative power supply terminal coupled to a reference supply terminal. A current-to-voltage converter has an input coupled to the current path of the copy transistor.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: January 1, 2019
    Assignee: STMicroelectronics Design & Application S.R.O.
    Inventor: Sandor Petenyi
  • Publication number: 20180120876
    Abstract: A voltage regulator having bias current boosting is provided. The voltage regulator includes a power stage for providing an output voltage to a load. The voltage regulator includes a differential stage that receives a feedback voltage representative of the output voltage and a reference voltage and controls the power stage based on a difference between the reference voltage and the feedback voltage. The voltage regulator includes a bias current boosting stage that receives the feedback and reference voltages. The bias current boosting stage provides a boosted bias current having a current level that is based on the difference between the reference and feedback voltages. The boosted bias current biases the differential stage and hastens a response of the differential stage, in response to a change in the difference between the reference voltage and the feedback voltage, in controlling the power stage.
    Type: Application
    Filed: October 27, 2016
    Publication date: May 3, 2018
    Inventor: Sandor PETENYI
  • Patent number: 9785165
    Abstract: A significant reduction of the amplitude of the transient response is obtained by keeping a low dropout regulator circuit in a closed loop condition. This is achieved by manipulation of the reference voltage level when an open loop condition arises due to a falling input voltage. In this case, the reference voltage level is tracked with the input voltage level, keeping the output voltage regulated. As a consequence, the power pass element of the regulator is not forced into the linear region (in the case of a MOSFET) or deep saturation (in the case of a bipolar transistor).
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: October 10, 2017
    Assignees: STMicroelectronics Design and Application S.R.O., STMicroelectronics S.r.l.
    Inventors: Sandor Petenyi, Calogero Ribellino
  • Patent number: 9742270
    Abstract: A voltage regulator is controlled to improve supply voltage rejection by cancelling an alternating component of a supply voltage signal that is capacitively coupled to a high-impedance node within the voltage regulator. This cancellation is done by capacitively coupling an inverted version of the alternating component to the high-impedance node to thereby substantially cancel the alternating component present on the high-impedance node. The high-impedance node may be a high-impedance voltage reference node of the voltage regulator.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: August 22, 2017
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Publication number: 20170220058
    Abstract: A significant reduction of the amplitude of the transient response is obtained by keeping a low dropout regulator circuit in a closed loop condition. This is achieved by manipulation of the reference voltage level when an open loop condition arises due to a falling input voltage. In this case, the reference voltage level is tracked with the input voltage level, keeping the output voltage regulated. As a consequence, the power pass element of the regulator is not forced into the linear region (in the case of a MOSFET) or deep saturation (in the case of a bipolar transistor).
    Type: Application
    Filed: February 3, 2016
    Publication date: August 3, 2017
    Applicants: STMicroelectronics Design and Application S.R.O., STMicroelectronics S.r.l.
    Inventors: Sandor Petenyi, Calogero Ribellino
  • Publication number: 20170194855
    Abstract: A voltage regulator is controlled to improve supply voltage rejection by cancelling an alternating component of a supply voltage signal that is capacitively coupled to a high-impedance node within the voltage regulator. This cancellation is done by capacitively coupling an inverted version of the alternating component to the high-impedance node to thereby substantially cancel the alternating component present on the high-impedance node. The high-impedance node may be a high-impedance voltage reference node of the voltage regulator.
    Type: Application
    Filed: December 31, 2015
    Publication date: July 6, 2017
    Inventor: Sandor Petenyi