Patents by Inventor Sandra Horton

Sandra Horton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8304871
    Abstract: A packaged semiconductor device includes a semiconductor die including a substrate having a topside including active circuitry and a bottomside with at least one backside metal layer directly attached. A package including a molding material having a die pad and a plurality of leads is encapsulated within the molding material, wherein the leads include an exposed portion that includes a bonding portion. The topside of the semiconductor die is attached to the die pad, and the package includes a gap that exposes the backside metal layer along a bottom surface of the package. Bond wires couple pads on the topside of the semiconductor die to the leads. The bonding portions, the molding material along the bottom surface of the package, and the backside metal layer are all substantially planar to one another.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: November 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Frank Yu, Lance Wright, Chien-Te Feng, Sandra Horton
  • Publication number: 20120256306
    Abstract: A packaged semiconductor device includes a semiconductor die including a substrate having a topside including active circuitry and a bottomside with at least one backside metal layer directly attached. A package including a molding material having a die pad and a plurality of leads is encapsulated within the molding material, wherein the leads include an exposed portion that includes a bonding portion. The topside of the semiconductor die is attached to the die pad, and the package includes a gap that exposes the backside metal layer along a bottom surface of the package. Bond wires couple pads on the topside of the semiconductor die to the leads. The bonding portions, the molding material along the bottom surface of the package, and the backside metal layer are all substantially planar to one another.
    Type: Application
    Filed: April 5, 2011
    Publication date: October 11, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: FRANK YU, LANCE WRIGHT, CHIEN-TE FENG, SANDRA HORTON
  • Patent number: 8188192
    Abstract: Elastomeric films which are both soft and thermally, UV and oxidatively stable are provided. The films are composed of coupled, selectively hydrogenated block copolymers having a relatively high molecular weight and high vinyl content. In addition to the block copolymer other components may be present in formulated films such as other block copolymers, hydrocarbon resins, polyolefins, metallocene polyolefins, homopolystyrene or mineral oils. The softness of the films is determined by the stress at 100% tensile elongation where the films with suitable softness have a 100% stress of about 100 psi or less. While soft, the films also are strong with tensile strengths of 1000 psi or more and suitable hysteresis properties. The elastomeric films are useful as integral components of personal hygiene articles such as gloves, diapers, incontinence products, disposable swimwear and disposable undergarments.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: May 29, 2012
    Assignee: Kraton Polymers U.S. LLC
    Inventors: Dale Lee Handlin, Jr., Phillip Doerpinghaus, Sandra Horton, legal representative, Keith Eiden, Margaret Clawson
  • Publication number: 20060156080
    Abstract: According to one embodiment of the present invention, a method for detecting a defect in an integrated circuit using an optimized power pulse includes applying a first pulse of power to a first integrated circuit for an optimized pulse duration. The optimized pulse duration is determined as a function of a difference in temperature between a second, defective integrated circuit and a third, non-defective integrated circuit. The temperature of the first integrated circuit is measured after the first pulse of power is applied to the first integrated circuit for the optimized pulse duration, and a determination is made as to whether the first integrated circuit is defective based on the temperature of the first integrated circuit.
    Type: Application
    Filed: December 10, 2004
    Publication date: July 13, 2006
    Inventors: John Tellkamp, Sandra Horton