Patents by Inventor Sandra L. Hyland

Sandra L. Hyland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9255345
    Abstract: A bulk manufacturing method for growing silicon-germanium stained-layer superlattice (SLS) using an ultra-high vacuum-chemical vapor deposition (UHV-CVD) system and a detector using it is disclosed. The growth method overcomes the stress caused by silicon and germanium lattice mismatch, and leads to uniform, defect-free layer-by-layer growth. Flushing hydrogen between the layer growths creates abrupt junctions between superlattice structure (SLS) layers. Steps include flowing a mixture of phosphine and germane gases over a germanium seed layer. This in-situ doped germanium growth step produces an n-doped germanium layer. Some of the phosphorus diffuses into the underlying germanium and reduces the stress in the underlying germanium that is initially created by the lattice mismatch between germanium and silicon. Phosphine can be replaced by diborane if a p-doped layer is desired. The reduction of stress results in a smooth bulk germanium growth.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: February 9, 2016
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Vu Anh Vu, Sandra L. Hyland, Robert L. Kamocsai, Daniel J. O'Donnell, Andrew T. Pomerene
  • Publication number: 20150028286
    Abstract: A bulk manufacturing method for growing silicon-germanium stained-layer superlattice (SLS) using an ultra-high vacuum-chemical vapor deposition (UHV-CVD) system and a detector using it is disclosed. The growth method overcomes the stress caused by silicon and germanium lattice mismatch, and leads to uniform, defect-free layer-by-layer growth. Flushing hydrogen between the layer growths creates abrupt junctions between superlattice structure (SLS) layers. Steps include flowing a mixture of phosphine and germane gases over a germanium seed layer. This in-situ doped germanium growth step produces an n-doped germanium layer. Some of the phosphorus diffuses into the underlying germanium and reduces the stress in the underlying germanium that is initially created by the lattice mismatch between germanium and silicon. Phosphine can be replaced by diborane if a p-doped layer is desired. The reduction of stress results in a smooth bulk germanium growth.
    Type: Application
    Filed: July 16, 2014
    Publication date: January 29, 2015
    Inventors: Vu Anh Vu, Sandra L. Hyland, Robert L. Kamocsai, Daniel J. O'Donnell, Andrew T. Pomerene
  • Patent number: 7883835
    Abstract: A method of double patterning a thin film is described. The method comprises forming a thin film to be patterned on a substrate, forming an anti-reflective coating (ARC) layer on the thin film, and forming a mask layer on the ARC layer. Thereafter, the mask layer is patterned to form a first pattern and a second pattern therein, and the first and second patterns are partially transferred to the ARC layer using a transfer process, such as an etching process or a developing process. Once the mask layer is removed, the first pattern and second patterns are completely transferred to the ARC layer using an etching process, and the first and second patterns in the ARC layer are transferred to the underlying thin film using another etching process.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: February 8, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Sandra L. Hyland, Shannon W. Dunn
  • Patent number: 7811747
    Abstract: A method of patterning a thin film is described. The method comprises forming a thin film to be patterned on a substrate, forming a developable anti-reflective coating (ARC) layer on the thin film, and forming a mask layer on the developable ARC layer. Thereafter, the mask layer is patterned to form a pattern therein, and the pattern is partially transferred to the developable ARC layer using an imaging and developing process. Once the mask layer is removed, the pattern is completely transferred to the developable ARC layer using an etching process, and the pattern in the developable ARC layer is transferred to the underlying thin film using another etching process.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: October 12, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Sandra L. Hyland, Shannon W. Dunn
  • Publication number: 20080073321
    Abstract: A method of patterning a thin film is described. The method comprises forming a thin film to be patterned on a substrate, forming an anti-reflective coating (ARC) layer on the thin film, and forming a mask layer on the ARC layer. Thereafter, the mask layer is patterned to form a pattern therein, and the pattern is partially transferred to the ARC layer using a transfer process, such as an etching process. Once the mask layer is removed, the pattern is completely transferred to the ARC layer using an etching process, and the pattern in the ARC layer is transferred to the underlying thin film using another etching process.
    Type: Application
    Filed: September 22, 2006
    Publication date: March 27, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Sandra L. Hyland, Shannon W. Dunn
  • Publication number: 20080076069
    Abstract: A method of patterning a thin film is described. The method comprises forming a thin film to be patterned on a substrate, forming a developable anti-reflective coating (ARC) layer on the thin film, and forming a mask layer on the developable ARC layer. Thereafter, the mask layer is patterned to form a pattern therein, and the pattern is partially transferred to the developable ARC layer using an imaging and developing process. Once the mask layer is removed, the pattern is completely transferred to the developable ARC layer using an etching process, and the pattern in the developable ARC layer is transferred to the underlying thin film using another etching process.
    Type: Application
    Filed: September 22, 2006
    Publication date: March 27, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Sandra L. Hyland, Shannon W. Dunn
  • Publication number: 20080076075
    Abstract: A method of double patterning a thin film is described. The method comprises forming a thin film to be patterned on a substrate, forming an anti-reflective coating (ARC) layer on the thin film, and forming a mask layer on the ARC layer. Thereafter, the mask layer is patterned to form a first pattern and a second pattern therein, and the first and second patterns are partially transferred to the ARC layer using a transfer process, such as an etching process or a developing process. Once the mask layer is removed, the first pattern and second patterns are completely transferred to the ARC layer using an etching process, and the first and second patterns in the ARC layer are transferred to the underlying thin film using another etching process.
    Type: Application
    Filed: September 22, 2006
    Publication date: March 27, 2008
    Applicant: Tokyo Electron Limited
    Inventors: Sandra L. Hyland, Shannon W. Dunn