Abstract: A memory cell is disclosed. In an embodiment a programmable read-only memory cell includes a first insulating layer located between a semiconductor body and a second conductive or semi-conductive layer, wherein the first insulating layer comprises a peripheral portion and a central portion, and wherein the peripheral portion has a greater thickness than the central portion.

Abstract: A device for protecting a circuit against a polarity reversal of a connection to a D.C. power supply, comprising a controllable switch interposed on said connection between a first terminal of a first voltage of the D.C. power supply and a first terminal of the circuit, and first means for turning-off with a delay the switch in the presence of a reverse polarity.

Abstract: A device for protecting a circuit against a polarity reversal of a connection to a D.C. power supply, comprising a controllable switch interposed on said connection between a first terminal of a first voltage of the D.C. power supply and a first terminal of the circuit, and first means for turning-off with a delay the switch in the presence of a reverse polarity.

Abstract: A MOS power transistor formed in an epitaxial layer of a first conductivity type, the MOS power transistor being formed on the front surface of a heavily-doped substrate of the first conductivity type, including a plurality of alternate drain and source fingers of the second conductivity type separated by a channel, conductive fingers covering each of the source fingers and of the drain fingers, a second metal level connecting all the drain metal fingers and substantially covering the entire source-drain structure. Each source finger includes a heavily-doped area of the first conductivity type in contact with the epitaxial layer and with the corresponding source finger, and the rear surface of the substrate is coated with a source metallization.

Abstract: A MOS power transistor formed in an epitaxial layer of a first conductivity type, the MOS power transistor being formed on the front surface of a heavily-doped substrate of the first conductivity type, including a plurality of alternate drain and source fingers of the second conductivity type separated by a channel, conductive fingers covering each of the source fingers and of the drain fingers, a second metal level connecting all the drain metal fingers and substantially covering the entire source-drain structure. Each source finger includes a heavily-doped area of the first conductivity type in contact with the epitaxial layer and with the corresponding source finger, and the rear surface of the substrate is coated with a source metallization.