Abstract: Aspects of the disclosure relate to evaluating pullovers for autonomous vehicles. In one instance, a set of potential pullover locations within a predetermined distance of a destination may be identified. Whether any of the potential pullover locations of the set include one or more of a plurality of predetermined types of regions of interest where a vehicle should not park for an extended period of time may be determined. A pullover location is identified based on the determination. The identified pullover location may be compared to a pullover location identified by autonomous vehicle control software in order to evaluate the pullover location identified by the autonomous vehicle control software.

Abstract: In described examples, a microelectromechanical system (MEMS) includes a first element and a second element. The first element is mounted on a substrate and has a first contact surface. The second element is mounted on the substrate and has a second contact surface that protrudes from the second element to form an acute contact surface. The first element and/or the second element is/are operable to move in: a first direction, such that the first contact surface comes in contact with the second contact surface; and a second direction, such that the second contact surface separates from the first contact surface.

Abstract: In described examples, a microelectromechanical system (MEMS) includes a first element and a second element. The first element is mounted on a substrate and has a first contact surface. The second element is mounted on the substrate and has a second contact surface that protrudes from the second element to form an acute contact surface. The first element and/or the second element is/are operable to move in: a first direction, such that the first contact surface comes in contact with the second contact surface; and a second direction, such that the second contact surface separates from the first contact surface.

Abstract: In described examples, a microelectromechanical system (MEMS) includes a first element and a second element. The first element is mounted on a substrate and has a first contact surface. The second element is mounted on the substrate and has a second contact surface that protrudes from the second element to form an acute contact surface. The first element and/or the second element is/are operable to move in: a first direction, such that the first contact surface comes in contact with the second contact surface; and a second direction, such that the second contact surface separates from the first contact surface.

Abstract: In described examples, a microelectromechanical system (MEMS) includes a first element and a second element. The first element is mounted on a substrate and has a first contact surface. The second element is mounted on the substrate and has a second contact surface that protrudes from the second element to form an acute contact surface. The first element and/or the second element is/are operable to move in: a first direction, such that the first contact surface comes in contact with the second contact surface; and a second direction, such that the second contact surface separates from the first contact surface.

Abstract: A method, which forms an air-bubble-free thin film with a high-viscosity fluid resin, initially dispenses the fluid resin on an outer region of a semiconductor wafer while the semiconductor wafer is spinning, and then dispenses the fluid resin onto the center of the semiconductor wafer after the semiconductor wafer has stopped spinning.

Abstract: A method of forming a micro-electromechanical systems (MEMS) pixel, such as a DMD type pixel, by forming a substrate having a non-planar upper surface, and depositing a photoresist spacer layer upon the substrate. The spacer layer is exposed to a grey-scale lithographic mask to shape an upper surface of the spacer layer. A control member is formed upon the planarized spacer layer, and an image member is formed over the control member. The image member is configured to be positioned as a function of the control member to form a spatial light modulator (SLM). The spacer layer is planarized by masking a selected portion of the spacer layer with a grey-scale lithographic mask to remove binge in the selected portion.

Abstract: A method, which forms an air-bubble-free thin film with a high-viscosity fluid resin, initially dispenses the fluid resin on an outer region of a semiconductor wafer while the semiconductor wafer is spinning, and then dispenses the fluid resin onto the center of the semiconductor wafer after the semiconductor wafer has stopped spinning.

Abstract: A method, which forms an air-bubble-free thin film with a high-viscosity fluid resin, initially dispenses the fluid resin on an outer region of a semiconductor wafer while the semiconductor wafer is spinning, and then dispenses the fluid resin onto the center of the semiconductor wafer after the semiconductor wafer has stopped spinning.

Abstract: A method of forming a micro-electromechanical systems (MEMS) pixel, such as a DMD-type pixel, by depositing a photoresist spacer layer upon a substrate. The photoresist spacer layer is exposed to a grey-scale lithographic mask to shape an upper surface of the photoresist spacer layer. A control member is formed upon the shaped spacer layer, and has a sloped portion configured to maximize energy density. An image member is configured to be positioned as a function of the control member to form a spatial light modulator (SLM).

Abstract: A method of forming a micro-electromechanical systems (MEMS) pixel, such as a DMD type pixel, by forming a substrate having a non-planar upper surface, and depositing a photoresist spacer layer upon the substrate. The spacer layer is exposed to a grey-scale lithographic mask to shape an upper surface of the spacer layer. A control member is formed upon the planarized spacer layer, and an image member is formed over the control member. The image member is configured to be positioned as a function of the control member to form a spatial light modulator (SLM). The spacer layer is planarized by masking a selected portion of the spacer layer with a grey-scale lithographic mask to remove binge in the selected portion.

Abstract: A method of forming a micro-electromechanical systems (MEMS) pixel, such as a DMD-type pixel, by depositing a photoresist spacer layer upon a substrate. The photoresist spacer layer is exposed to a grey-scale lithographic mask to shape an upper surface of the photoresist spacer layer. A control member is formed upon the shaped spacer layer, and has a sloped portion configured to maximize energy density. An image member is configured to be positioned as a function of the control member to form a spatial light modulator (SLM).

Abstract: A method, which forms an air-bubble-free thin film with a high-viscosity fluid resin, initially dispenses the fluid resin on an outer region of a semiconductor wafer while the semiconductor wafer is spinning, and then dispenses the fluid resin onto the center of the semiconductor wafer after the semiconductor wafer has stopped spinning.

Abstract: A method of patterning a polysilicon feature includes forming a hard mask layer over a polysilicon layer, wherein the hard mask layer includes a silicon rich silicon oxynitride layer, and a silicon oxynitride layer or bottom anti-reflective coating (BARC) layer overlying the silicon rich silicon oxynitride layer. The method further includes forming a photoresist layer over the hard mask layer, selectively exposing the photoresist layer with 193 nm ultraviolet radiation, and developing the exposed photoresist, thereby defining a photoresist feature. The hard mask layer is then patterned using the photoresist feature as an etch mask, and the polysilicon layer is patterned using the patterned hard mask as an etch mask.

Abstract: A method to form an embedded FLASH integrated circuit with reduced processing steps is described. In the method a partial etch is performed on the control gate region of a polycrystalline silicon film (21). A multiple etch process is then used to simultaneously form the FLASH memory cell gate stack (54), the NMOS gate structure (94) and the PMOS gate structure (96).