Patents by Inventor Sandrine Lhostis

Sandrine Lhostis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140374574
    Abstract: A spectral filter includes an assembly of filtering cells. Each cell has a same nanostructured pattern and a preferential direction of the pattern. This preferential direction is, for each cell, oriented approximately radially with respect to a single point of the spectral filter. Alternatively, this preferential direction is, for each cell, oriented approximately ortho-radially with respect to the single point of the spectral filter. The single point may be a center point. Alternatively, the single point may correspond to an optical axis of a lens element associated with the spectral filter.
    Type: Application
    Filed: June 16, 2014
    Publication date: December 25, 2014
    Applicants: STMICROELECTRONICS (CROLLES 2) SAS, Commissariat a L'Energie Atomique et aux Energies Alternatives
    Inventors: Romain Girard Desprolet, Sandrine Lhostis, Salim Boutami
  • Publication number: 20140210071
    Abstract: An integrated structure includes a support supporting at least one chip and a heat dissipating housing, attached to the chip. The housing is thermally conductive and has a thermal expansion compatible with the chip. The housing may further including closed cavities filled with a phase change material.
    Type: Application
    Filed: January 14, 2014
    Publication date: July 31, 2014
    Applicants: STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS SA
    Inventors: Laurent-Luc Chapelon, Pascal Ancey, Sandrine Lhostis
  • Patent number: 8759808
    Abstract: A memory cell including a via made of a phase-change material arranged between a lower electrode and an upper electrode, wherein the via includes a first region adjacent to a second region itself adjacent to at least one third region, the first, second, and third regions each extending from the upper electrode to the lower electrode, the crystallization temperature of the second region ranging between that of the first region and that of the third region, and the melting temperatures of the first, second, and third regions being substantially identical.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: June 24, 2014
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventors: Jean-Francois Nodin, Veronique Sousa, Sandrine Lhostis
  • Publication number: 20140070158
    Abstract: A memory cell including a via made of a phase-change material arranged between a lower electrode and an upper electrode, wherein the via includes a central region laterally surrounded with a peripheral region, the crystallization and melting temperatures of the central region being respectively lower than those of the peripheral region.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 13, 2014
    Applicants: Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Francois Nodin, Veronique Sousa, Sandrine Lhostis
  • Publication number: 20140070163
    Abstract: A memory cell including a via made of a phase-change material arranged between a lower electrode and an upper electrode, wherein the via includes a first region adjacent to a second region itself adjacent to at least one third region, the first, second, and third regions each extending from the upper electrode to the lower electrode, the crystallization temperature of the second region ranging between that of the first region and that of the third region, and the melting temperatures of the first, second, and third regions being substantially identical.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 13, 2014
    Applicants: Commissariat à I'Énergie Atomique et aux Énergies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Francois Nodin, Veronique Sousa, Sandrine Lhostis
  • Patent number: 8154091
    Abstract: An integrated electronic circuit has a thin layer portion based on hafnium oxide. This portion additionally contains magnesium atoms, so that the portion is in the form of a hafnium-and-magnesium mixed oxide. Such a portion has a high dielectric constant and a very low leakage current. It is particularly suitable for forming a part of a gate insulation layer of a MOS transistor or a part of a MIM capacitor dielectric.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: April 10, 2012
    Assignees: Centre National de la Recherche Scientifique-CNRS, Institut National Polytechnique de Grenoble
    Inventors: Catherine Dubourdieu, Erwan Yann Rauwel, Vincent Cosnier, Sandrine Lhostis, Daniel-Camille Bensahel
  • Publication number: 20100059834
    Abstract: An integrated electronic circuit has a thin layer portion based on hafnium oxide. This portion additionally contains magnesium atoms, so that the portion is in the form of a hafnium-and-magnesium mixed oxide. Such a portion has a high dielectric constant and a very low leakage current. It is particularly suitable for forming a part of a gate insulation layer of a MOS transistor or a part of a MIM capacitor dielectric.
    Type: Application
    Filed: April 25, 2008
    Publication date: March 11, 2010
    Applicants: STMicroelectronics (Crolles) SAS, Centre National de La Recherche Scientifique - CNRS -, Institut National Polytechnique De Grenoble
    Inventors: Catherine Dubourdieu, Erwan Yann Ruawel, Vincent Cosnier, Sandrine Lhostis, Daniel-Camille Bensahel