Patents by Inventor Sandro Pinarello

Sandro Pinarello has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11368133
    Abstract: An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SV?ETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SV?ETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: June 21, 2022
    Assignee: Intel Corporation
    Inventors: Andrea Camuffo, Sandro Pinarello
  • Publication number: 20210091732
    Abstract: An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SV?ETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SV?ETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
    Type: Application
    Filed: October 5, 2020
    Publication date: March 25, 2021
    Inventors: Andrea Camuffo, Sandro Pinarello
  • Patent number: 10826447
    Abstract: An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SV?ETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SV?ETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: November 3, 2020
    Assignee: Intel IP Corporation
    Inventors: Andrea Camuffo, Sandro Pinarello
  • Publication number: 20200313634
    Abstract: An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SV?ETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SV?ETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
    Type: Application
    Filed: October 11, 2018
    Publication date: October 1, 2020
    Inventors: Andrea Camuffo, Sandro Pinarello
  • Publication number: 20200119705
    Abstract: An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SV?ETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SV?ETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 16, 2020
    Inventors: Andrea Camuffo, Sandro Pinarello
  • Patent number: 10129823
    Abstract: An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV < an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SV?ETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SV?ETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: November 13, 2018
    Assignee: Intel IP Corporation
    Inventors: Andrea Camuffo, Sandro Pinarello
  • Publication number: 20180288697
    Abstract: An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV<an envelope tracking (ET) threshold (ETT), then the processor configures the PA to transmit a signal in an average power tracking (APT) mode that maintains the SV at the SVV during the TS. When the SV?ETT, and an APT condition is met, then the processor configures the PA to transmit the signal in the APT mode. When the SV?ETT, and the APT condition is not met, then the processor transmits by an adjustment to the SVV to track an amplitude modulation envelope during the TS in an ET mode.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 4, 2018
    Inventors: Andrea Camuffo, Sandro Pinarello
  • Patent number: 8912851
    Abstract: An apparatus for providing a linearity information associated with an amplifier includes an operating state determinator and an evaluator. The operating state determinator is configured to obtain information describing a gain of the amplifier for at least one bias condition of the amplifier. The evaluator is configured to obtain the linearity information based on both the information describing the gain of the amplifier and information about the at least one bias condition of the amplifier using a gain-bias characteristic of the amplifier. A bias circuit including the apparatus for providing the linearity information is also disclosed.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: December 16, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventors: Sandro Pinarello, Andrea Camuffo, Chi-Tao Goe, Nick Shute, Jan-Erik Mueller, Bernhard Sogl
  • Patent number: 8908751
    Abstract: One embodiment of the present invention relates to a method and apparatus are provided herein for reducing the power consumption of a transmission chain while maintaining an acceptable figure of merit (e.g., linearity). In one embodiment, an adaptive biasing element is configured to perform adaptive biasing to reduce current consumption of a transmission chain by adjusting the operating point of one or more transmission chain elements (e.g., power amplifier, mixer, etc.). However, since adaptive biasing may reduce the linearity of a transmitted signal, its use is limited by the degradation of figure of merit caused by the introduced non-linearities. Accordingly, a pre-distortion element may be configured to perform adaptive digital pre-distortion (DPD) on a transmission chain input signal to account for non-linearities generated through the adaptive biasing, therefore allowing the adaptive biasing to further reduce the current consumption while maintaining an acceptable figure of merit.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: December 9, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventors: Andrea Camuffo, Chi-Tao Goe, Bernhard Sogl, Sandro Pinarello, Jan-Erik Mueller, Nick Shute
  • Patent number: 8482348
    Abstract: One embodiment of the present invention relates to a power amplifier comprising a plurality of amplifying elements connected in a serial-parallel matrix configuration, containing parallel columns having amplifying elements connected in series. The parallel columns are connected to a common output path coupled to a supply voltage source configured to provide an equal supply voltage to each of the columns. One or more input signals (e.g., RF input signals) are connected to the power amplifier by way of input terminals on a first row of amplifying elements. The remaining amplifying elements have control terminals that are connected to independent control signals, which allow each amplifying element to be operated independent of the other amplifying elements in the matrix. This selective operation of amplifying elements allows for improved efficiency over a wide range of power amplifier output powers.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: July 9, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Sandro Pinarello, Jan-Erik Mueller
  • Publication number: 20130049867
    Abstract: One embodiment of the present invention relates to a power amplifier comprising a plurality of amplifying elements connected in a serial-parallel matrix configuration, containing parallel columns having amplifying elements connected in series. The parallel columns are connected to a common output path coupled to a supply voltage source configured to provide an equal supply voltage to each of the columns. One or more input signals (e.g., RF input signals) are connected to the power amplifier by way of input terminals on a first row of amplifying elements. The remaining amplifying elements have control terminals that are connected to independent control signals, which allow each amplifying element to be operated independent of the other amplifying elements in the matrix. This selective operation of amplifying elements allows for improved efficiency over a wide range of power amplifier output powers.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Applicant: Intel Mobile Communications GmbH
    Inventors: Sandro Pinarello, Jan-Erik Mueller
  • Patent number: 8364103
    Abstract: One embodiment of the present invention relates to a transmission circuit configured to dynamically adjust a number of active transistor cells within a power amplifier based upon a signal quality measurement determined from a feedback. The transmission circuit comprises a transmission chain having a power amplifier configured to provide an output signal. A feedback loop extends from the output of the power amplifier to a control circuit and is configured to provide measured information about output signal (e.g., phase, amplitude, etc.) to the control circuit. The control circuit utilizes the measured signal information to evaluate a measured signal quality of the output signal. The control circuit dynamically adjusts a number of active transistor cells within a power amplifier based upon a signal quality measurement until the power amplifier is optimized to operate at an operating point for low current and good transmission quality.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: January 29, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Sandro Pinarello, Andrea Camuffo, Chi-Tao Goe, Nick Shute, Jan-Erik Mueller
  • Publication number: 20120219048
    Abstract: One embodiment of the present invention relates to a method and apparatus are provided herein for reducing the power consumption of a transmission chain while maintaining an acceptable figure of merit (e.g., linearity). In one embodiment, an adaptive biasing element is configured to perform adaptive biasing to reduce current consumption of a transmission chain by adjusting the operating point of one or more transmission chain elements (e.g., power amplifier, mixer, etc.). However, since adaptive biasing may reduce the linearity of a transmitted signal, its use is limited by the degradation of figure of merit caused by the introduced non-linearities. Accordingly, a pre-distortion element may be configured to perform adaptive digital pre-distortion (DPD) on a transmission chain input signal to account for non-linearities generated through the adaptive biasing, therefore allowing the adaptive biasing to further reduce the current consumption while maintaining an acceptable figure of merit.
    Type: Application
    Filed: February 28, 2011
    Publication date: August 30, 2012
    Applicant: Infineon Technologies AG
    Inventors: Andrea Camuffo, Chi-Tao Goe, Bernhard Sogl, Sandro Pinarello, Jan-Erik Mueller, Nick Shute
  • Publication number: 20120169424
    Abstract: An apparatus for providing a linearity information associated with an amplifier includes an operating state determinator and an evaluator. The operating state determinator is configured to obtain information describing a gain of the amplifier for at least one bias condition of the amplifier. The evaluator is configured to obtain the linearity information based on both the information describing the gain of the amplifier and information about the at least one bias condition of the amplifier using a gain-bias characteristic of the amplifier. A bias circuit including the apparatus for providing the linearity information is also disclosed.
    Type: Application
    Filed: December 30, 2010
    Publication date: July 5, 2012
    Applicant: Infineon Technologies AG
    Inventors: Sandro Pinarello, Andrea Camuffo, Chi-Tao Goe, Nick Shute, Jan-Erik Mueller, Bernhard Sogl
  • Publication number: 20120071120
    Abstract: One embodiment of the present invention relates to a transmission circuit configured to dynamically adjust a number of active transistor cells within a power amplifier based upon a signal quality measurement determined from a feedback. The transmission circuit comprises a transmission chain having a power amplifier configured to provide an output signal. A feedback loop extends from the output of the power, amplifier to a control circuit and is configured to provide measured information about output signal (e.g., phase, amplitude, etc.) to the control circuit. The control circuit utilizes the measured signal information to evaluate a measured signal quality of the output signal. The control circuit dynamically adjusts a number of active transistor cells within a power amplifier based upon a signal quality measurement until the power amplifier is optimized to operate at an operating point for low current and good transmission quality.
    Type: Application
    Filed: September 21, 2010
    Publication date: March 22, 2012
    Applicant: Infineon Technologies AG
    Inventors: Sandro Pinarello, Andrea Camuffo, Chi-Tao Goe, Nick Shute, Jan-Erik Mueller