Abstract: A heat exchanger assembly includes a first heat exchanger having a pair of mounts attached to one of the tanks of the first heat exchanger and a second heat exchanger having a pair of brackets attached to one of the tanks of the second heat exchanger. The brackets are freely insertable into the mounts when the two heat exchangers are at an acute angle with respect to each other. When the two heat exchangers are parallel with each other, an interference condition exists between the brackets and the mounts. The opposite side of the heat exchangers is secured using a retainer on one heat exchanger extending through a strap on the other heat exchanger.

Abstract: A fastening system fastens a radiator, an electric fan support and a fan shroud as a single unit. The radiator has lower and upper posts to which slotted plates protruding from the fan support and fan shroud fit over. A structural sandwich is formed with the fan support lying between the radiator and the fan shroud. A flexible lever arm with a locking tab lies adjacent to the upper post of the radiator and connects to the radiator. When the fan support is fitted over the posts, the top plate of the electric fan support locks under the first lever arm tab. The fan shroud also has two slotted plates that also fit over the posts of the radiator. The fan shroud locks into place when a lever arm with a tab on the fan shroud locks under a tab that protrudes from the top plate of the fan support.

Abstract: A heat exchanger assembly includes a first heat exchanger having a pair of mounts attached to one of the tanks of the first heat exchanger and a second heat exchanger having a pair of brackets attached to one of the tanks of the second heat exchanger. The brackets are freely insertable into the mounts when the two heat exchangers are at an acute angle with respect to each other. When the two heat exchangers are parallel with each other, an interference condition exists between the brackets and the mounts. The opposite side of the heat exchangers is secured using a retainer on one heat exchanger extending through a strap on the other heat exchanger.

Abstract: A leadless semiconductor package mainly includes a semiconductor device securely attached to an upper surface of a die pad by solder paste and a plurality of leads arranged about the periphery of the die pad. The thickness of the leads and the die pad are within a range of 10 to 20 mils. The semiconductor device is electrically coupled to one of the leads. A package body is formed over the semiconductor device and the leads in a manner that the lower surfaces of the die pad and the leads are exposed through the package body. Preferably, the first semiconductor device is electrically coupled to one of the leads by at least one heavy gauge aluminum wire. The present invention further provides a method of producing the semiconductor package described above.

Abstract: A fastening system fastens a radiator, an electric fan support and a fan shroud as a single unit. The radiator has lower and upper posts to which slotted plates protruding from the fan support and fan shroud fit over. A structural sandwich is formed with the fan support lying between the radiator and the fan shroud. A flexible lever arm with a locking tab lies adjacent to the upper post of the radiator and connects to the radiator. When the fan support is fitted over the posts, the top plate of the electric fan support locks under the first lever arm tab. The fan shroud also has two slotted plates that also fit over the posts of the radiator. The fan shroud locks into place when a lever arm with a tab on the fan shroud locks under a tab that protrudes from the top plate of the fan support.

Abstract: A semiconductor package mainly includes a leadframe and a first semiconductor chip such as an application specific integrated circuit (ASIC) encapsulated in a first package body having a cavity for receiving a second semiconductor chip such as a pressure sensor chip, and a cover disposed over the cavity of the first package body. At least a portion of the first package body is formed between the second semiconductor chip and the die pad such that the second semiconductor chip is directly disposed on the portion of the first package body instead of the die pad.

Abstract: A semiconductor package mainly includes a leadframe and a first semiconductor chip such as an application specific integrated circuit (ASIC) encapsulated in a first package body having a cavity for receiving a second semiconductor chip such as a pressure sensor chip, and a cover disposed over the cavity of the first package body. At least a portion of the first package body is formed between the second semiconductor chip and the die pad such that the second semiconductor chip is directly disposed on the portion of the first package body instead of the die pad.

Abstract: A method for fabricating leadless packages with mold locking characteristics is disclosed. A provided leadless leadframe has a plurality of units in a matrix, each unit includes an improved die pad with a plurality of indentations, such as semi-vias in the sidewall thereof and a plurality of leads around the die pad. After chip attachment and electrical connection, a plurality of package bodies for semiconductor packages are individually formed on the corresponding units and covered the indentations in order to enhance the horizontal mold locking capability of the die pad. Using punching, connecting bars of the leadless leadframe are removed to isolate the leadless packages.

Abstract: A process for manufacturing a plurality of leadless semiconductor packages includes an electrically testing step to test encapsulated chips in a matrix of a leadless leadframe. Firstly, a leadless leadframe having at least a packaging matrix is provided. The packaging matrix defines a plurality of units and a plurality of cutting streets between the units. The leadless leadframe has a plurality of leads in the units and a plurality of connecting bars connecting the leads along the cutting streets. A plated metal layer is formed on the upper surfaces of the leads and the upper surfaces of the connecting bars. After die-attaching, wire-bonding connection, and encapsulation, the leadless leadframe is etched to remove the connecting bars, then two sawing steps are performed. During the first sawing step, the plated metal layer on the upper surface of the connecting bars is cut out to electrically isolate the leads.

Abstract: The present invention includes providing a leadframe including a metal layer formed on an upper surface of the leadframe and a plurality of units in an array arrangement, in which each unit includes a die pad, a plurality of leads, and a plurality of outer dambars, adhering a die to the die pad, forming a plurality of conductive wires to electrically connect bond pads of the die with bond regions of the leads, forming an encapsulation covering the leadframe, forming a patterned photoresist layer on a lower surface of the leadframe to expose a plurality of interval regions and the outer dambars, performing an etching process to expose the metal layer located in the interval regions and the outer dambars, cutting off the metal layer located in the interval regions by a half cutting process, and performing a singulation process to singulate the units.

Abstract: A leadless semiconductor package mainly includes a semiconductor device securely attached to an upper surface of a die pad by solder paste and a plurality of leads arranged about the periphery of the die pad. The thickness of the leads and the die pad are within a range of 10 to 20 mils. The semiconductor device is electrically coupled to one of the leads. A package body is formed over the semiconductor device and the leads in a manner that the lower surfaces of the die pad and the leads are exposed through the package body. Preferably, the first semiconductor device is electrically coupled to one of the leads by at least one heavy gauge aluminum wire. The present invention further provides a method of producing the semiconductor package described above.

Abstract: A leadless leadframe with an improved die pad for mold locking includes a die pad and a plurality of leads. The leads are arranged around the die pad. A plurality of indentations, such as side semi-vias, are formed on the sidewall of the die pad for filling a package body of the semiconductor package so as to enhance the horizontal mold locking capability of the die pad.

Abstract: A process for manufacturing a plurality of leadless semiconductor packages includes an electrically testing step to test encapsulated chips in a matrix of a leadless leadframe. Firstly, a leadless leadframe having at least a packaging matrix is provided. The packaging matrix defines a plurality of units and a plurality of cutting streets between the units. The leadless leadframe has a plurality of leads in the units and a plurality of connecting bars connecting the leads along the cutting streets. A plated metal layer is formed on the upper surfaces of the leads and the upper surfaces of the connecting bars. After die-attaching, wire-bonding connection, and encapsulation, the leadless leadframe is etched to remove the connecting bars, then two sawing steps are performed. During the first sawing step, the plated metal layer on the upper surface of the connecting bars is cut out to electrically isolate the leads.

Abstract: A method for fabricating leadless packages with mold locking characteristics is disclosed. A provided leadless leadframe has a plurality of units in a matrix, each unit includes an improved die pad with a plurality of indentations, such as semi-vias in the sidewall thereof and a plurality of leads around the die pad. After chip attachment and electrical connection, a plurality of package bodies for semiconductor packages are individually formed on the corresponding units and covered the indentations in order to enhance the horizontal mold locking capability of the die pad. Using punching, connecting bars of the leadless leadframe are removed to isolate the leadless packages.

Abstract: A leadless leadframe with an improved die pad for mold locking includes a die pad and a plurality of leads. The leads are arranged around the die pad. A plurality of indentations, such as side semi-vias, are formed on the sidewall of the die pad for filling a package body of the semiconductor package so as to enhance the horizontal mold locking capability of the die pad.