Patents by Inventor Sang-Bong Bang

Sang-Bong Bang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7629274
    Abstract: A storage node, a method of fabricating the same, a semiconductor memory device and a method of fabricating the same is provided. The method of fabricating a storage node may include forming a lower electrode, forming an irradiated data storage layer and forming an upper electrode.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: December 8, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hyun Lee, Sang-Bong Bang
  • Patent number: 7579283
    Abstract: Provided is an insulation layer patterning method employing a flowable oxide, which does not use a photo-resist. Also, an insulation layer pattern and display devices including the insulation layer are disclosed.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: August 25, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Choi, Jung-hyun Lee, Sang-bong Bang
  • Patent number: 7507958
    Abstract: A conductive carbon nanotube tip and a manufacturing method thereof are provided. The conductive carbon nanotube tip includes a carbon nanotube tip substantially vertically placed on a substrate, and a ruthenium coating layer covering a surface of the carbon nanotube tip and extending to at least a part of the substrate. The manufacturing method includes substantially vertically placing a carbon nanotube tip on a substrate, and forming a ruthenium coating layer on the carbon nanotube tip and at least a part of the substrate.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: March 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-jun Choi, Jung-hyun Lee, Sang-bong Bang, Bum-seok Seo, Chang-soo Lee
  • Patent number: 7410913
    Abstract: Provided are methods for manufacturing silicon rich oxide (SRO) layers useful in the fabrication of semiconductor devices, for example, non-volatile memory devices, and methods for fabricating semiconductor devices incorporating such SRO layers. The methods include absorbing a first silicon source gas onto the substrate, oxidizing the first absorbed layer to form a silicon oxide layer, absorbing a second silicon source gas onto the substrate and reducing the second absorbed layer to form a silicon layer. The combination of the silicon oxide layer(s) and the silicon layer(s) comprise, in turn, a composite SRO layer. These manufacturing methods facilitate control of the oxygen concentration in the SRO, the relative thicknesses of the silicon oxide and silicon layers, and provides improved step coverage, thus allowing the manufacturing of high quality semiconductor devices.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: August 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hyun Lee, Sang-Bong Bang
  • Publication number: 20070196984
    Abstract: Provided are a nonvolatile memory device, a layer deposition apparatus and a method of fabricating a nonvolatile memory device using the same. The apparatus may include a chamber capable of holding a substrate, a particle-discharging target discharging particles toward the substrate, and a first ion beam gun accelerating a first plurality of ions and irradiating the accelerated ions toward the substrate. The method of fabricating a nonvolatile memory device may include discharging particles from a target toward a substrate, accelerating and irradiating a first plurality of ions toward the substrate, forming a reaction product by reacting the discharged particles and the accelerated and irradiated first plurality of ions, and forming a data storage layer having a deposited layer on the substrate. The nonvolatile memory device may include a data storage layer including a transition metal oxide layer formed by reacting discharged transition metal particles and accelerated and irradiated oxygen ions.
    Type: Application
    Filed: January 19, 2007
    Publication date: August 23, 2007
    Inventors: Jung-hyun Lee, Sang-bong Bang, Sang-jun Choi, Bum-seok Seo, Chang-soo Lee
  • Publication number: 20070184667
    Abstract: Provided is an insulation layer patterning method employing a flowable oxide, which does not use a photo-resist. Also, an insulation layer pattern and display devices including the insulation layer are disclosed.
    Type: Application
    Filed: January 16, 2007
    Publication date: August 9, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Sang-jun Choi, Jung-hyun Lee, Sang-bong Bang
  • Publication number: 20070164214
    Abstract: A conductive carbon nanotube tip and a manufacturing method thereof are provided. The conductive carbon nanotube tip includes a carbon nanotube tip substantially vertically placed on a substrate, and a ruthenium coating layer covering a surface of the carbon nanotube tip and extending to at least a part of the substrate. The manufacturing method includes substantially vertically placing a carbon nanotube tip on a substrate, and forming a ruthenium coating layer on the carbon nanotube tip and at least a part of the substrate.
    Type: Application
    Filed: August 31, 2006
    Publication date: July 19, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-jun Choi, Jung-Hyun Lee, Sang-bong Bang, Bum-seok Seo, Chang-soo Lee
  • Publication number: 20070072424
    Abstract: Provided are methods for manufacturing silicon rich oxide (SRO) layers useful in the fabrication of semiconductor devices, for example, non-volatile memory devices, and methods for fabricating semiconductor devices incorporating such SRO layers. The methods include absorbing a first silicon source gas onto the substrate, oxidizing the first absorbed layer to form a silicon oxide layer, absorbing a second silicon source gas onto the substrate and reducing the second absorbed layer to form a silicon layer. The combination of the silicon oxide layer(s) and the silicon layer(s) comprise, in turn, a composite SRO layer. These manufacturing methods facilitate control of the oxygen concentration in the SRO, the relative thicknesses of the silicon oxide and silicon layers, and provides improved step coverage, thus allowing the manufacturing of high quality semiconductor devices.
    Type: Application
    Filed: September 12, 2006
    Publication date: March 29, 2007
    Inventors: Jung-Hyun Lee, Sang-Bong Bang
  • Publication number: 20070045701
    Abstract: A storage node, a method of fabricating the same, a semiconductor memory device and a method of fabricating the same is provided. The method of fabricating a storage node may include forming a lower electrode, forming an irradiated data storage layer and forming an upper electrode.
    Type: Application
    Filed: August 24, 2006
    Publication date: March 1, 2007
    Inventors: Jung-Hyun Lee, Sang-Bong Bang