Patents by Inventor Sang Byeon

Sang Byeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103199
    Abstract: A window includes a base layer, a high refractive layer disposed on the base layer, and a low refractive layer disposed on the high refractive layer. The high refractive layer includes inorganic particles and a base resin, and the low refractive layer includes a fluorine-containing silsesquioxane-based resin.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 28, 2024
    Inventors: HUNG KUN AHN, Seunghwan CHUNG, Sang-il PARK, Minseong BYEON
  • Publication number: 20240099100
    Abstract: A display device includes a display module, a window on the display module, and a protective layer on the window, and including a first base layer, a second base layer on the first base layer, a base adhesive layer between the first base layer and the second base layer, and including a silicone-based adhesive, and a surface coating layer on the second base layer, having a single-film structure, and including a hard coating material and an anti-fingerprint material.
    Type: Application
    Filed: August 17, 2023
    Publication date: March 21, 2024
    Inventors: MINSEONG BYEON, SANG-IL PARK, SUNGGUK AN
  • Publication number: 20070183246
    Abstract: An internal voltage generation circuit of a semiconductor memory device controls a dead zone voltage, in which the driving unit that supplies a power supply voltage, does not need to operate. An internal voltage having a dead zone is determined by first and second driving signals based on a level of a reference voltage, and by selectively supplying first and second voltages by means of the first and second driving signals.
    Type: Application
    Filed: December 29, 2006
    Publication date: August 9, 2007
    Inventor: Sang Byeon
  • Publication number: 20060103452
    Abstract: Disclosed is an internal voltage generator capable of outputting a constant voltage regardless of change of a supply voltage. The internal voltage generator includes a current mirror unit, drivers and a voltage divider and prevents a channel length modulation phenomenon by changing the structure of the current mirror unit.
    Type: Application
    Filed: May 4, 2005
    Publication date: May 18, 2006
    Inventors: Sang Byeon, Kee Park
  • Publication number: 20060104144
    Abstract: A semiconductor memory device generates a control signal for regulating a potential of an internal power voltage when an extended mode register is set to adjust an operating speed and a tWR (time to write recovery) of a chip. The semiconductor memory device comprises an extended mode register setting unit and an internal power voltage generating unit. When an internal circuit enters into a specific mode for high-speed operation, the extended mode register setting unit outputs a plurality of internal power control signals to regulate a potential of an internal power voltage of the internal circuit. The internal power voltage generating unit generates an internal power voltage by regulating the potential of the internal power voltage in response to the plurality of internal power control signals.
    Type: Application
    Filed: June 30, 2005
    Publication date: May 18, 2006
    Applicant: Hynix Semiconductor Inc.
    Inventors: Sang Byeon, Kee Park
  • Publication number: 20050104571
    Abstract: Provided is A power-up signal generating circuit, comprising: a voltage sensing unit for sensing that a potential of an external power source voltage is above a certain potential, the voltage sensing unit comprising a first switching element operated according to the external power source voltage and a resistor serially connected to the first switching element; a power-up signal generating unit for generating a power-up signal according to an output signal of the voltage sensing unit, the power-up generating unit comprising a second switching element; and a buffering unit for buffering the power-up signal from the power-up signal generating unit up to a certain potential and outputting the buffered power-up signal, wherein a timing of generating the power-up signal is controlled by the second switching element being turned on and off according to a threshold voltage of the first switching element.
    Type: Application
    Filed: December 23, 2003
    Publication date: May 19, 2005
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Sang Byeon, Kee Park