Abstract: An internal voltage generation circuit of a semiconductor memory device controls a dead zone voltage, in which the driving unit that supplies a power supply voltage, does not need to operate. An internal voltage having a dead zone is determined by first and second driving signals based on a level of a reference voltage, and by selectively supplying first and second voltages by means of the first and second driving signals.

Abstract: Disclosed is an internal voltage generator capable of outputting a constant voltage regardless of change of a supply voltage. The internal voltage generator includes a current mirror unit, drivers and a voltage divider and prevents a channel length modulation phenomenon by changing the structure of the current mirror unit.

Abstract: A semiconductor memory device generates a control signal for regulating a potential of an internal power voltage when an extended mode register is set to adjust an operating speed and a tWR (time to write recovery) of a chip. The semiconductor memory device comprises an extended mode register setting unit and an internal power voltage generating unit. When an internal circuit enters into a specific mode for high-speed operation, the extended mode register setting unit outputs a plurality of internal power control signals to regulate a potential of an internal power voltage of the internal circuit. The internal power voltage generating unit generates an internal power voltage by regulating the potential of the internal power voltage in response to the plurality of internal power control signals.

Abstract: Provided is A power-up signal generating circuit, comprising: a voltage sensing unit for sensing that a potential of an external power source voltage is above a certain potential, the voltage sensing unit comprising a first switching element operated according to the external power source voltage and a resistor serially connected to the first switching element; a power-up signal generating unit for generating a power-up signal according to an output signal of the voltage sensing unit, the power-up generating unit comprising a second switching element; and a buffering unit for buffering the power-up signal from the power-up signal generating unit up to a certain potential and outputting the buffered power-up signal, wherein a timing of generating the power-up signal is controlled by the second switching element being turned on and off according to a threshold voltage of the first switching element.