Abstract: A method for forming a metal line in a semiconductor device and an associated apparatus. The method includes at least one of (1) Depositing a metal line layer and a metal contact layer over a semiconductor substrate. (2) Patterning the metal contact layer and the metal line layer to form a primarily formed contact portion and a lower metal line. (3) Patterning the primarily formed contact portion to form a secondarily formed contact portion. (4) Forming an insulating film on the semiconductor substrate including the secondarily formed contact portion and the lower metal line. (5) Planarizing the insulating film such that the secondarily formed contact portion is exposed. (6) Forming an upper metal line over the planarized insulating film to be in electrical contact with the secondarily formed contact portion.

Abstract: There is provided a Pb-free free cutting steel is formed of 0.03 to 0.30 wt % of carbon (C), 0.01 to 0.30 wt % of silicon (Si), 0.2 to 2.0 wt % of manganese (Mn), 0.02 to 0.10 wt % of phosphorus, 0.06 to 0.45 wt % of sulfur (S), 0.04 to 0.20 wt % of bismuth (Bi), 0.04 to 0.20 wt % of tin (Sn), 0.001 to 0.015 wt % of boron (B), 0.001 to 0.010 wt % of nitrogen (N), 0.002 to 0.025 wt % of total oxygen (T[O]), and residual Fe, and unavoidable impurities, wherein S, Bi, S, B, and N satisfy a certain relationship. The steel has excellent machinability no less than conventional free cutting steel including Pb, while being eco-friendly. Also, the steel has excellent hot ductility capable of reducing occurrence of defects on a surface, thereby improving hot rolling workability.

Abstract: A method for forming metal lines of a semiconductor device is disclosed. The metal line forming method includes forming plugs by perforating via-holes in an interlayer dielectric layer formed on a semiconductor substrate and burying a conductive material in the via-holes, sequentially forming at least two metal layers on the interlayer dielectric layer formed with the plugs, the metal layers having a difference in the size of metal grains of each metal layer, etching an uppermost first metal layer of the at least two metal layers using a photoresist pattern formed on the first metal layer as an etching mask using a first etching gas, and etching the partially etched first metal layer using a second etching gas.

Abstract: A method for forming metal lines of a semiconductor device is disclosed. The metal line forming method includes forming plugs by perforating via-holes in an interlayer dielectric layer formed on a semiconductor substrate and burying a conductive material in the via-holes, sequentially forming at least two metal layers on the interlayer dielectric layer formed with the plugs, the metal layers having a difference in the size of metal grains of each metal layer, etching an uppermost first metal layer of the at least two metal layers using a photoresist pattern formed on the first metal layer as an etching mask using a first etching gas, and etching the partially etched first metal layer using a second etching gas.

Abstract: A method for fabricating a metal-insulator-metal (MIM) capacitor of a semiconductor device is provided. The method includes simultaneously patterning a lower metal film pattern and a dielectric film pattern to form a first structure in a MIM capacitor region and a second structure in a metal line region, removing the dielectric film pattern in the metal line region, forming a second insulating film to cover the dielectric film pattern in the MIM capacitor region and the lower metal line film pattern in the metal line region, simultaneously forming a trench that exposes the dielectric film pattern in the MIM capacitor region and a via hole that exposes the lower metal line film pattern in the metal line region by passing through the second insulating film, and forming an upper metal electrode film pattern and a via contact to respectively bury the trench and the via hole.

Abstract: Methods of forming a multi-level metal line of a semiconductor device are disclosed. One example method includes subsequently stacking first and second metal layers, wherein a conductive etching stopper layer is interposed at an interface between the first and second metal layers; forming first and second metal layer pattern by patterning the first metal layer, the etching stopper layer, and the second metal layer, wherein the first metal layer pattern is formed as a lower metal line; forming a connection contact in form of a plug by selectively etching the second metal layer pattern until the etching stopper layer is exposed; forming an interlayer insulating layer to cover the connection contact and the first metal layer pattern; and exposing an upper surface of the connection contact by planarizing the interlayer insulating layer.

Abstract: A method for fabricating a metal-insulator-metal (MIM) capacitor of a semiconductor device is provided. The method includes simultaneously patterning a lower metal film pattern and a dielectric film pattern to form a first structure in a MIM capacitor region and a second structure in a metal line region, removing the dielectric film pattern in the metal line region, forming a second insulating film to cover the dielectric film pattern in the MIM capacitor region and the lower metal line film pattern in the metal line region, simultaneously forming a trench that exposes the dielectric film pattern in the MIM capacitor region and a via hole that exposes the lower metal line film pattern in the metal line region by passing through the second insulating film, and forming an upper metal electrode film pattern and a via contact to respectively bury the trench and the via hole.

Abstract: A photoconductive composition and a display device adopting a photoconductive layer formed of the composition. The photoconductive composition includes an electron donor, an electron acceptor, a charge transmitting substance, a binder, a surfactant and a solvent, and the photoconductive composition is characterized in that a 1,4-diphenyl-1-butene-3-yne derivative is used as the electron donor. The photoconductive composition has excellent sensitivity and thermal decomposition property. Thus, there are scarcely residues left after the sintering process, thereby effectively preventing deterioration in image quality of a display device.

Abstract: A photoconductive composition and a display device adopting a photoconductive layer formed of the composition. The photoconductive composition includes an electron donor, an electron acceptor, a charge transmitting substance, a binder, a surfactant and a solvent, and the photoconductive composition is characterized in that a 1,4-diphenyl-1-butene-3-yne derivative is used as the electron donor. The photoconductive composition has excellent sensitivity and thermal decomposition property. Thus, there are scarcely residues left after the sintering process, thereby effectively preventing deterioration in image quality of a display device.