Patents by Inventor Sang H. Chai

Sang H. Chai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing a semiconductor device with vertically stacked structure
    Patent number: 5236858
    Abstract: The invention relates to a method of manufacturing a DRAM in which a storage capacitor is stacked vertically over a switching junction FET.
    Type: Grant
    Filed: November 25, 1991
    Date of Patent: August 17, 1993
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu H. Lee, Sang H. Chai, Soon I. Yeo, Jin S. Kim, Jin H. Lee
  • Method for manufacturing a Bi-CMOS semiconductor device
    Patent number: 5149663
    Abstract: There is provided a method of manufacturing Bi-CMOS semiconductor devices in which further comprises the steps of; depositing a polysilicon layer, an oxide film and a nitride film one and another in order to form the emitter and collector of a bipolar transistor, and the gates of a CMOS; forming an oxide film and a nitride film at the side wall of the polysilicon layer one and another; etching the exposed portions of an epitaxial layer and depositing other nitride film on the nitride film at the side wall; growing an oxide film on the etched portions of the epitaxial layer and removing all the nitride films; and implanting impurities on portions of the epitaxial layer exposed by the etched nitride films in order to make the inactive base region of the bipolar transistor and the source/drain regions of a PMOS transistor P+ type, and to make the source/drain regions of a NMOS transistor n+ type.
    Type: Grant
    Filed: October 21, 1991
    Date of Patent: September 22, 1992
    Assignee: Korean Electronics and Telecommunications
    Inventors: Sang H. Chai, Yong S. Koo, Kwang S. Kim, Kee S. Nam