Abstract: Aspects of the present invention include methods for diagnosing and monitoring IgAN in a subject. In practicing one aspect of the subject methods, a sample from a subject is analyzed for the presence of one or more specific autoantibodies to determine the IgAN phenotype of the subject. Also provided are compositions, systems, kits and computer program products that find use in practicing the subject methods. The methods and compositions find use in a variety of applications.

Abstract: Aspects of the present invention include methods for diagnosing and monitoring IgAN in a subject. In practicing one aspect of the subject methods, a sample from a subject is analyzed for the presence of one or more specific autoantibodies to determine the IgAN phenotype of the subject. Also provided are compositions, systems, kits and computer program products that find use in practicing the subject methods. The methods and compositions find use in a variety of applications.

Abstract: A storage electrode of a DRAM cell in a highly-integrated semiconductor device has, in order to secure the surface area thereof greater than that of a conventional tunnel-type storage electrode, an upper plate of storage electrode formed over a lower plate of storage electrode separated therefrom by a predetermined distance, while interposing bars of irregularly shapes formed of a conductive layer to electrically connect the upper and lower plates.

Abstract: There is disclosed a method for the fabrication of a capacitor of a DRAM, comprising the characteristic steps of: forming a bellows type storage electrode; depositing an impurity-doped polysilicon film on the entire surface of the storage electrode; and diffusing the dopants into impurity-rare edge portions of the storage electrode through an annealing treatment. Accordingly, it is capable of easily securing the capacitance of a capacitor in greater quantity per unit area, and thus, effects a reduction in production cost.

Abstract: A method is disclosed for the wet etching of polysilicon, which comprises the steps of: annealing a lamination structure of a doped polysilicon and an undoped polysilicon at a predetermined temperature for a predetermined period; and applying to the annealed lamination structure a chemical etchant comprising nitric acid, fluoric acid, acetic acid and deionized water with the volume ratio of nitric acid to acetic acid to fluoric acid to deionized water being 30:3:x:15+(1-x) wherein x is a real number ranging from 0.2 to 1.0, so as to remove the doped polysilicon film. Instead of fluoric acid, alcohol may be used in the chemical etchant without affecting the etching selectivity. This method is superior in performance with regard to selective etching between the undoped polysilicon and the doped polysilicon. Therefore, the doped polysilicon which is useful in many ways, for example, storage electrode, insertion layer and contact, can be etched in such a thickness as is needed, with the chemical etchant.

Abstract: A method for fabricating a storage electrode of a DRAM cell capable of preventing impurities from excessively moving from the storage electrode to diffusion regions. The storage electrode is formed by a double formation of polysilicon layers. An undoped polysilicon layer 11 is primarily deposited over the entire exposed surface of the resulting structure to a thickness corresponding to 40 to 50% of a predetermined thickness of the storage electrode. A doped polysilicon layer is secondarily deposited over the undoped polysilicon layer to a thickness corresponding to 60 to 50% of the predetermined thickness of the storage electrode. The doped polysilicon layer and the undoped polysilicon layer are subjected to a patterning so that predetermined portions thereof are removed so as to form the storage electrode.

Abstract: A method is disclosed for forming a gate electrode having two polysilicon layers and a tungsten silicide layer to prevent fluorine gas diffusion along grain boundaries from penetrating into a gate oxide film.This method for forming a gate electrode is comprised of sequentially forming a gate oxide film and a first polysilicon layer on a silicon substrate, enlarging the grain size of the first polysilicon layer by heat treatment, introducing a reagent gas, either SiH.sub.4 or Si.sub.2 H.sub.6, to further adjust the grain size within said layer, forming a second polysilicon layer on the first polysilicon layer, enlarging the grain size of the second polysilicon layer by heat treatment, introducing a reagent gas, either Si.sub.2 H.sub.6 or SiH.sub.

Abstract: A method for manufacturing a TFT of a SRAM in a highly-integrated semiconductor device, to enlarge the grain size of a polysilicon film, includes steps of depositing amorphous silicon film under a pressure capable of maintaining a uniform thickness thereof, and forming a polysilicon film which has a maximized grain size in the same tube that the amorphous silicon film has been deposited, while performing an annealing process by raising the temperature to 600.degree.-650.degree. C. for 4-10 hours under the pressure which is lowered to approximately 10.sup.-3 Torr. The polysilicon film having a maximized grain size is utilized as the channels of the TFT.

Abstract: A storage electrode of a DRAM cell in a highly-integrated semiconductor device has, in order to secure the surface area thereof greater than that of a conventional tunnel-type storage electrode, an upper plate of storage electrode formed over a lower plate of storage electrode separated therefrom by a predetermined distance, while interposing bars of various shapes formed of a conductive layer to electrically connect the upper and lower plates, and a method for manufacturing the storage electrode is also provided.