Abstract: A display device according to an embodiment includes: a substrate; a transistor on the substrate; a pixel electrode electrically connected to the transistor; a pixel defining layer on the pixel electrode and having a first opening overlapping the pixel electrode; an emission layer on the pixel electrode; a common electrode on the pixel definition layer and the emission layer; an encapsulation layer on the common electrode; a light extraction pattern on the encapsulation layer and having a first refractive index; and a reflection control layer covering the light extraction pattern and having a second refractive index different from the first refractive index.

Abstract: An embodiment of the present specification provides a method for preparing a catalyst for preparing a carbon nanotube, comprising: (a) dissolving a main catalyst precursor, a support precursor, a cocatalyst precursor and a precipitation inhibitor in a solvent to prepare a precursor solution; and (b) pyrolyzing the precursor solution by spraying the precursor solution into a reactor, wherein a mole fraction of the precipitation inhibitor to the cocatalyst precursor is 0.1 to 1.5.

Abstract: An inductor-integrated transformer as an embodiment of the present invention includes a transformer core including an upper core and a lower core; a transformer coil including a primary coil and a secondary coil; an inductor core including an upper core and a lower core; and an inductor coil, wherein the primary coil includes a plurality of input terminals spaced a first distance apart from a first surface of the transformer core; and a plurality of input terminals spaced a second distance apart from a second surface, and the output terminal is electrically connected to the secondary coil and the inductor coil, and the first distance is greater than the second distance.

Abstract: A thin-film transistor including an active layer disposed on a substrate and including a channel region, a source region connected to a side of the channel region, and a drain region connected to the other side of the channel region; a gate insulating layer on the channel region of the active layer; and a gate electrode on the gate insulating layer. A slope of each side surface of the gate electrode with respect to a boundary surface between the gate insulating layer and the gate electrode is an obtuse angle (a substantially obtuse angel). A slope of each side surface of the gate insulating layer with respect to the boundary surface between the gate insulating layer and the gate electrode is an obtuse angle (a substantially obtuse angel).

Abstract: A graft copolymer, and a graft copolymer composition having excellent particulate dispersibility in a curable resin such as an epoxy resin and is applicable as a particulate impact reinforcing agent, a curable resin composition including same, and methods of preparing them.

Abstract: A hydrogel prepared through the supramolecular self-assembly of cyclodextrin and adamantane is described. The hydrogel can be filled with drugs and cells and used for various diseases. The hydrogel uses hyaluronic acid and thus can be applied to transdermal delivery, in vivo drug release, intractable disease treatment using stem cells, etc.

Abstract: A wet etching system operating method includes providing an etching apparatus having an Nth etching solution, loading Nth batch substrates into the etching apparatus and performing an Nth etching process, discharging some of the Nth etching solution, refilling the etching apparatus with an (N+1)th etching solution supplied from a supply apparatus connected to the etching apparatus, and loading (N+1)th batch substrates into the etching apparatus and performing an (N+1)th etching process, wherein the (N+1)th etching solution has a temperature within or higher than a temperature management range of the (N+1)th etching process, and wherein the (N+1)th etching solution has a concentration within or higher than a concentration management range of the (N+1)th etching solution, N being a positive integer.

Abstract: A voltage clamping circuit includes a first detection circuit, a second detection circuit, and a discharge circuit. The first detection circuit detects a voltage level of a power voltage during a first operation period of a semiconductor apparatus. The second detection circuit detects the voltage level of the power voltage during a second operation period of the semiconductor apparatus. The discharge circuit changes the voltage level of the power voltage based on the detection results of the first and second detection circuits.

Abstract: A wet etching system operating method includes providing an etching apparatus having an Nth etching solution, loading Nth batch substrates into the etching apparatus and performing an Nth etching process, discharging some of the Nth etching solution, refilling the etching apparatus with an (N+1)th etching solution supplied from a supply apparatus connected to the etching apparatus, and loading (N+1)th batch substrates into the etching apparatus and performing an (N+1)th etching process, wherein the (N+1)th etching solution has a temperature within or higher than a temperature management range of the (N+1)th etching process, and wherein the (N+1)th etching solution has a concentration within or higher than a concentration management range of the (N+1)th etching solution, N being a positive integer.

Abstract: A voltage clamping circuit includes a first detection circuit, a second detection circuit, and a discharge circuit. The first detection circuit detects a voltage level of a power voltage during a first operation period of a semiconductor apparatus. The second detection circuit detects the voltage level of the power voltage during a second operation period of the semiconductor apparatus. The discharge circuit changes the voltage level of the power voltage based on the detection results of the first and second detection circuits.

Abstract: Provided is a power consumption reduction type power converter. For example, such a power converter includes a regulator configured to convert a power voltage into an operation power of a main integrated circuit (IC), a mode detecting pin configured to detect a voltage level of the operation power, wherein the detected voltage level indicates a disable mode or an enable mode, a mode signal output circuit connected to the mode detecting pin, configured to output a mode converting signal, and a switching controller configured to block or connect a power route according to the mode converting signal to supply or block the operation power from being provided to the main IC, wherein the mode detecting pin is connected to a first switch and a first capacitor to perform a charging or a discharging operation of the first capacitor according to a switching operation of the first switch.

Abstract: A semiconductor memory device may include first to fourth data storage regions. The semiconductor memory device may include a first to fourth capacitor groups and a voltage-generating circuit. The first capacitor group may be arranged adjacent to the first data storage region to provide the first data storage region with a first stabilizing voltage. The second capacitor group may be arranged adjacent to the second data storage region to provide the second data storage region with a second stabilizing voltage. The third capacitor group may be arranged adjacent to the third data storage region to provide the third data storage region with a third stabilizing voltage. The fourth capacitor group may be arranged adjacent to the fourth data storage region to provide the fourth data storage region with a fourth stabilizing voltage. The voltage-generating circuit may be configured to provide the first to fourth capacitor groups with an internal voltage.

Abstract: The present invention relates to a low friction member having seaweed-type nanotubes, the nanotubes which protrude like seaweed on the surface of a base material being concentrated in the moving direction of a sliding member, thereby improving the fluidity of a liquid lubricant, thus enabling the effective reduction of surface friction. Such present invention comprises: a base material which has a plurality of dimples formed on the surface thereof so as to reduce friction occurring due to the surface contact of a sliding member; a fixing material which is filled inside the dimples; nanotubes which are buried in the fixing material and protrude to the outside by means of the surface processing of the fixing material; and a liquid lubricant which is coated on the surface of the base material, wherein, as the protruding nanotubes become concentrated in the moving direction of the sliding member, the fluidity of the liquid lubricant is improved, thereby enabling the effective reduction of surface friction.

Abstract: A semiconductor memory apparatus of the technology includes a current sink circuit configured to allow a portion of a current flowing through a memory cell to flow to a negative voltage terminal in a read operation and a sense amplifier configured to detect data of the memory cell and a detection result in response to a sense amplifier enable signal in the read operation. The current sink circuit varies an amount of the current flowing to the negative voltage terminal in response to the sense amplifier enable signal.

Abstract: The present invention relates to a low-friction member imitating shark skin and a manufacturing method therefor, the low-friction member implementing a structure similar to shark skin and having riblets by stacking, in layers, composite particles formed by attaching spherical particles on the surfaces of plate-shaped particles, and thus the low-friction member has excellent low-friction characteristics. The present invention comprises: a base plate; plate-shaped particles stacked in layers on the surface of the base plate in the form of scales; and a plurality of spherical metal lubricating particles having a size smaller than that of the plate-shaped particles, and coated on the surfaces of the plate-shaped particles, wherein the metal lubricating particles are arranged in the form of a bridge connecting the base plate and the plate-shaped particles, and the plate-shaped particles to each other.

Abstract: A semiconductor memory apparatus of the technology includes a current sink circuit configured to allow a portion of a current flowing through a memory cell to flow to a negative voltage terminal in a read operation and a sense amplifier configured to detect data of the memory cell and a detection result in response to a sense amplifier enable signal in the read operation. The current sink circuit varies an amount of the current flowing to the negative voltage terminal in response to the sense amplifier enable signal.

Abstract: A semiconductor memory device may include first to fourth data storage regions. The semiconductor memory device may include a first to fourth capacitor groups and a voltage-generating circuit. The first capacitor group may be arranged adjacent to the first data storage region to provide the first data storage region with a first stabilizing voltage. The second capacitor group may be arranged adjacent to the second data storage region to provide the second data storage region with a second stabilizing voltage. The third capacitor group may be arranged adjacent to the third data storage region to provide the third data storage region with a third stabilizing voltage. The fourth capacitor group may be arranged adjacent to the fourth data storage region to provide the fourth data storage region with a fourth stabilizing voltage. The voltage-generating circuit may be configured to provide the first to fourth capacitor groups with an internal voltage.

Abstract: A resistance variable memory apparatus in accordance with an embodiment may include a memory cell array and a read circuit. The memory cell array may include a plurality of resistance variable memory cells coupled between a plurality of word lines and a plurality of bit lines. The read circuit may couple a word line, to which a selected resistance variable memory cell is coupled, to a first ground voltage supply terminal for a preset first time period before an amount of current flowing through the selected resistance variable memory cell is detected. The read circuit may couple a bit line, to which the selected resistance variable memory cell is coupled, to a power voltage supply terminal for a preset second time period, in a read operation.

Abstract: The present examples relate to a power factor correction device, a power factor correction method, and a corresponding converter, in which when an input signal inputted into the converter is changed, a reference signal is also changed to fit to the input signal in consideration of only the frequency and the phase of the input signal. Thus, even without a specifically designated control circuit, examples make it possible to improve power factor correction and Total Harmonic Distortion (THD) and to reduce the size of a semiconductor chip, and examples are potentially used for a device receiving waveforms other than a sine wave.

Abstract: The present invention relates to a low-friction member imitating shark skin and a manufacturing method therefor, the low-friction member implementing a structure similar to shark skin and having riblets by stacking, in layers, composite particles formed by attaching spherical particles on the surfaces of plate-shaped particles, and thus the low-friction member has excellent low-friction characteristics. The present invention comprises: a base plate; plate-shaped particles stacked in layers on the surface of the base plate in the form of scales; and a plurality of spherical metal lubricating particles having a size smaller than that of the plate-shaped particles, and coated on the surfaces of the plate-shaped particles, wherein the metal lubricating particles are arranged in the form of a bridge connecting the base plate and the plate-shaped particles, and the plate-shaped particles to each other.