Patents by Inventor Sang-hoon Jeong

Sang-hoon Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250001001
    Abstract: A hydrogel prepared through the supramolecular self-assembly of cyclodextrin and adamantane is described. The hydrogel can be filled with drugs and cells and used for various diseases. The hydrogel uses hyaluronic acid and thus can be applied to transdermal delivery, in vivo drug release, intractable disease treatment using stem cells, etc.
    Type: Application
    Filed: June 5, 2024
    Publication date: January 2, 2025
    Inventors: Sei Kwang HAHN, Mun Gu KIM, Sang Hoon JEONG
  • Publication number: 20210393800
    Abstract: A hydrogel prepared through the supramolecular self-assembly of cyclodextrin and adamantane is described. The hydrogel can be filled with drugs and cells and used for various diseases. The hydrogel uses hyaluronic acid and thus can be applied to transdermal delivery, in vivo drug release, intractable disease treatment using stem cells, etc.
    Type: Application
    Filed: October 25, 2019
    Publication date: December 23, 2021
    Inventors: Sei Kwang HAHN, Mun Gu KIM, Sang Hoon JEONG
  • Patent number: 10910237
    Abstract: A wet etching system operating method includes providing an etching apparatus having an Nth etching solution, loading Nth batch substrates into the etching apparatus and performing an Nth etching process, discharging some of the Nth etching solution, refilling the etching apparatus with an (N+1)th etching solution supplied from a supply apparatus connected to the etching apparatus, and loading (N+1)th batch substrates into the etching apparatus and performing an (N+1)th etching process, wherein the (N+1)th etching solution has a temperature within or higher than a temperature management range of the (N+1)th etching process, and wherein the (N+1)th etching solution has a concentration within or higher than a concentration management range of the (N+1)th etching solution, N being a positive integer.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: February 2, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Hoon Jeong, Yong Sun Ko, Dong Ha Kim, Tae Heon Kim, Chang Sup Mun, Woo Gwan Shim, Jun Youl Yang, Se Ho Cha
  • Patent number: 10719095
    Abstract: A voltage clamping circuit includes a first detection circuit, a second detection circuit, and a discharge circuit. The first detection circuit detects a voltage level of a power voltage during a first operation period of a semiconductor apparatus. The second detection circuit detects the voltage level of the power voltage during a second operation period of the semiconductor apparatus. The discharge circuit changes the voltage level of the power voltage based on the detection results of the first and second detection circuits.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: July 21, 2020
    Assignee: SK hynix Inc.
    Inventor: Sang Hoon Jeong
  • Publication number: 20200203195
    Abstract: A wet etching system operating method includes providing an etching apparatus having an Nth etching solution, loading Nth batch substrates into the etching apparatus and performing an Nth etching process, discharging some of the Nth etching solution, refilling the etching apparatus with an (N+1)th etching solution supplied from a supply apparatus connected to the etching apparatus, and loading (N+1)th batch substrates into the etching apparatus and performing an (N+1)th etching process, wherein the (N+1)th etching solution has a temperature within or higher than a temperature management range of the (N+1)th etching process, and wherein the (N+1)th etching solution has a concentration within or higher than a concentration management range of the (N+1)th etching solution, N being a positive integer.
    Type: Application
    Filed: July 3, 2019
    Publication date: June 25, 2020
    Inventors: Sang Hoon JEONG, Yong Sun KO, Dong Ha KIM, Tae Heon KIM, Chang Sup MUN, Woo Gwan SHIM, Jun Youl YANG, Se Ho CHA
  • Publication number: 20190384336
    Abstract: A voltage clamping circuit includes a first detection circuit, a second detection circuit, and a discharge circuit. The first detection circuit detects a voltage level of a power voltage during a first operation period of a semiconductor apparatus. The second detection circuit detects the voltage level of the power voltage during a second operation period of the semiconductor apparatus. The discharge circuit changes the voltage level of the power voltage based on the detection results of the first and second detection circuits.
    Type: Application
    Filed: December 5, 2018
    Publication date: December 19, 2019
    Applicant: SK hynix Inc.
    Inventor: Sang Hoon JEONG
  • Patent number: 10411590
    Abstract: Provided is a power consumption reduction type power converter. For example, such a power converter includes a regulator configured to convert a power voltage into an operation power of a main integrated circuit (IC), a mode detecting pin configured to detect a voltage level of the operation power, wherein the detected voltage level indicates a disable mode or an enable mode, a mode signal output circuit connected to the mode detecting pin, configured to output a mode converting signal, and a switching controller configured to block or connect a power route according to the mode converting signal to supply or block the operation power from being provided to the main IC, wherein the mode detecting pin is connected to a first switch and a first capacitor to perform a charging or a discharging operation of the first capacitor according to a switching operation of the first switch.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: September 10, 2019
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Zhi Yuan Cui, In Ho Hwang, Young Gi Ryu, Tae Young Park, Sang Hoon Jeong
  • Patent number: 10332578
    Abstract: A semiconductor memory device may include first to fourth data storage regions. The semiconductor memory device may include a first to fourth capacitor groups and a voltage-generating circuit. The first capacitor group may be arranged adjacent to the first data storage region to provide the first data storage region with a first stabilizing voltage. The second capacitor group may be arranged adjacent to the second data storage region to provide the second data storage region with a second stabilizing voltage. The third capacitor group may be arranged adjacent to the third data storage region to provide the third data storage region with a third stabilizing voltage. The fourth capacitor group may be arranged adjacent to the fourth data storage region to provide the fourth data storage region with a fourth stabilizing voltage. The voltage-generating circuit may be configured to provide the first to fourth capacitor groups with an internal voltage.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: June 25, 2019
    Assignee: SK hynix Inc.
    Inventors: Sang Hoon Jeong, Hyun Ju Ham
  • Patent number: 10266783
    Abstract: The present invention relates to a low friction member having seaweed-type nanotubes, the nanotubes which protrude like seaweed on the surface of a base material being concentrated in the moving direction of a sliding member, thereby improving the fluidity of a liquid lubricant, thus enabling the effective reduction of surface friction. Such present invention comprises: a base material which has a plurality of dimples formed on the surface thereof so as to reduce friction occurring due to the surface contact of a sliding member; a fixing material which is filled inside the dimples; nanotubes which are buried in the fixing material and protrude to the outside by means of the surface processing of the fixing material; and a liquid lubricant which is coated on the surface of the base material, wherein, as the protruding nanotubes become concentrated in the moving direction of the sliding member, the fluidity of the liquid lubricant is improved, thereby enabling the effective reduction of surface friction.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: April 23, 2019
    Assignee: Industry-University Cooperation Foundation Sunmoon University
    Inventors: Soo Wohn Lee, Seung Ho Kim, Tae Ho Kim, Sang Hoon Jeong, Jin Hyuk Choi
  • Patent number: 10204675
    Abstract: A semiconductor memory apparatus of the technology includes a current sink circuit configured to allow a portion of a current flowing through a memory cell to flow to a negative voltage terminal in a read operation and a sense amplifier configured to detect data of the memory cell and a detection result in response to a sense amplifier enable signal in the read operation. The current sink circuit varies an amount of the current flowing to the negative voltage terminal in response to the sense amplifier enable signal.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: February 12, 2019
    Assignee: SK hynix Inc.
    Inventor: Sang Hoon Jeong
  • Patent number: 10144893
    Abstract: The present invention relates to a low-friction member imitating shark skin and a manufacturing method therefor, the low-friction member implementing a structure similar to shark skin and having riblets by stacking, in layers, composite particles formed by attaching spherical particles on the surfaces of plate-shaped particles, and thus the low-friction member has excellent low-friction characteristics. The present invention comprises: a base plate; plate-shaped particles stacked in layers on the surface of the base plate in the form of scales; and a plurality of spherical metal lubricating particles having a size smaller than that of the plate-shaped particles, and coated on the surfaces of the plate-shaped particles, wherein the metal lubricating particles are arranged in the form of a bridge connecting the base plate and the plate-shaped particles, and the plate-shaped particles to each other.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: December 4, 2018
    Assignee: Industry-University Cooperation Foundation Sunmoon University
    Inventors: Soo Wohn Lee, Seung Ho Kim, Tae Ho Kim, Sang Hoon Jeong, Jin Hyuk Choi
  • Publication number: 20180114563
    Abstract: A semiconductor memory apparatus of the technology includes a current sink circuit configured to allow a portion of a current flowing through a memory cell to flow to a negative voltage terminal in a read operation and a sense amplifier configured to detect data of the memory cell and a detection result in response to a sense amplifier enable signal in the read operation. The current sink circuit varies an amount of the current flowing to the negative voltage terminal in response to the sense amplifier enable signal.
    Type: Application
    Filed: September 12, 2017
    Publication date: April 26, 2018
    Applicant: SK hynix Inc.
    Inventor: Sang Hoon JEONG
  • Publication number: 20180108394
    Abstract: A semiconductor memory device may include first to fourth data storage regions. The semiconductor memory device may include a first to fourth capacitor groups and a voltage-generating circuit. The first capacitor group may be arranged adjacent to the first data storage region to provide the first data storage region with a first stabilizing voltage. The second capacitor group may be arranged adjacent to the second data storage region to provide the second data storage region with a second stabilizing voltage. The third capacitor group may be arranged adjacent to the third data storage region to provide the third data storage region with a third stabilizing voltage. The fourth capacitor group may be arranged adjacent to the fourth data storage region to provide the fourth data storage region with a fourth stabilizing voltage. The voltage-generating circuit may be configured to provide the first to fourth capacitor groups with an internal voltage.
    Type: Application
    Filed: September 13, 2017
    Publication date: April 19, 2018
    Applicant: SK hynix Inc.
    Inventors: Sang Hoon JEONG, Hyun Ju HAM
  • Patent number: 9922710
    Abstract: A resistance variable memory apparatus in accordance with an embodiment may include a memory cell array and a read circuit. The memory cell array may include a plurality of resistance variable memory cells coupled between a plurality of word lines and a plurality of bit lines. The read circuit may couple a word line, to which a selected resistance variable memory cell is coupled, to a first ground voltage supply terminal for a preset first time period before an amount of current flowing through the selected resistance variable memory cell is detected. The read circuit may couple a bit line, to which the selected resistance variable memory cell is coupled, to a power voltage supply terminal for a preset second time period, in a read operation.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: March 20, 2018
    Assignee: SK hynix Inc.
    Inventor: Sang Hoon Jeong
  • Patent number: 9887621
    Abstract: The present examples relate to a power factor correction device, a power factor correction method, and a corresponding converter, in which when an input signal inputted into the converter is changed, a reference signal is also changed to fit to the input signal in consideration of only the frequency and the phase of the input signal. Thus, even without a specifically designated control circuit, examples make it possible to improve power factor correction and Total Harmonic Distortion (THD) and to reduce the size of a semiconductor chip, and examples are potentially used for a device receiving waveforms other than a sine wave.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: February 6, 2018
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Zhi Yuan Cui, In Ho Hwang, Young Gi Ryu, Sang Hoon Jeong, Gyu Ho Lim
  • Publication number: 20180010059
    Abstract: The present invention relates to a low-friction member imitating shark skin and a manufacturing method therefor, the low-friction member implementing a structure similar to shark skin and having riblets by stacking, in layers, composite particles formed by attaching spherical particles on the surfaces of plate-shaped particles, and thus the low-friction member has excellent low-friction characteristics. The present invention comprises: a base plate; plate-shaped particles stacked in layers on the surface of the base plate in the form of scales; and a plurality of spherical metal lubricating particles having a size smaller than that of the plate-shaped particles, and coated on the surfaces of the plate-shaped particles, wherein the metal lubricating particles are arranged in the form of a bridge connecting the base plate and the plate-shaped particles, and the plate-shaped particles to each other.
    Type: Application
    Filed: December 4, 2015
    Publication date: January 11, 2018
    Inventors: Soo Wohn Lee, Seung Ho Kim, Tae Ho Kim, Sang Hoon Jeong, Jin Hyuk Choi
  • Publication number: 20180002627
    Abstract: The present invention relates to a low friction member having seaweed-type nanotubes, the nanotubes which protrude like seaweed on the surface of a base material being concentrated in the moving direction of a sliding member, thereby improving the fluidity of a liquid lubricant, thus enabling the effective reduction of surface friction. Such present invention comprises: a base material which has a plurality of dimples formed on the surface thereof so as to reduce friction occurring due to the surface contact of a sliding member; a fixing material which is filled inside the dimples; nanotubes which are buried in the fixing material and protrude to the outside by means of the surface processing of the fixing material; and a liquid lubricant which is coated on the surface of the base material, wherein, as the protruding nanotubes become concentrated in the moving direction of the sliding member, the fluidity of the liquid lubricant is improved, thereby enabling the effective reduction of surface friction.
    Type: Application
    Filed: October 12, 2015
    Publication date: January 4, 2018
    Inventors: Soo Wohn LEE, Seung Ho KIM, Tae Ho KIM, Sang Hoon JEONG, Jin Hyuk CHOI
  • Publication number: 20160294286
    Abstract: Provided is a power consumption reduction type power converter. For example, such a power converter includes a regulator configured to convert a power voltage into an operation power of a main integrated circuit (IC), a mode detecting pin configured to detect a voltage level of the operation power, wherein the detected voltage level indicates a disable mode or an enable mode, a mode signal output circuit connected to the mode detecting pin, configured to output a mode converting signal, and a switching controller configured to block or connect a power route according to the mode converting signal to supply or block the operation power from being provided to the main IC, wherein the mode detecting pin is connected to a first switch and a first capacitor to perform a charging or a discharging operation of the first capacitor according to a switching operation of the first switch.
    Type: Application
    Filed: March 28, 2016
    Publication date: October 6, 2016
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Zhi Yuan CUI, In Ho HWANG, Young Gi RYU, Tae Young PARK, Sang Hoon JEONG
  • Publication number: 20160218616
    Abstract: The present examples relate to a power factor correction device, a power factor correction method, and a corresponding converter, in which when an input signal inputted into the converter is changed, a reference signal is also changed to fit to the input signal in consideration of only the frequency and the phase of the input signal. Thus, even without a specifically designated control circuit, examples make it possible to improve power factor correction and Total Harmonic Distortion (THD) and to reduce the size of a semiconductor chip, and examples are potentially used for a device receiving waveforms other than a sine wave.
    Type: Application
    Filed: December 29, 2015
    Publication date: July 28, 2016
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Zhi Yuan CUI, In Ho HWANG, Young Gi RYU, Sang Hoon JEONG, Gyu Ho LIM
  • Publication number: 20150253328
    Abstract: The present invention concerns a detection marker which is specific to nanomaterial-induced cytotoxicity, and provides: a nanomaterial-induced cytotoxicity detection composition and kit, comprising an ERK gene which is specifically overexpressed when nanomaterial-induced cytotoxicity is present, an Egr-1 gene which is activated by the ERK gene, and an agent for measuring the level of the mRNA thereof or protein thereof; and a method for detecting nanomaterial-induced cytotoxicity by using the composition and kit. The composition, the kit and the detection method according to the present invention allow straightforward and accurate detection of cytotoxicity induced by nanomaterials comprised in, for example, the cells of nanomaterials.
    Type: Application
    Filed: November 14, 2012
    Publication date: September 10, 2015
    Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Sang-Wook Son, Sang Hoon Jeong